AD8331 Datasheet, PDF (1/32 Pages) Analog Devices – Ultralow Noise VGAs with Preamplifier and Programmable RIN

Ultralow Noise VGAs with
Preamplifier and Programmable R_IN
AD8331/AD8332
FEATURES
Ultralow noise preamplifier
Voltage noise = 0.74 nV/√Hz
Current noise = 2.5 pA/√Hz
3 dB bandwidth: 120 MHz
Low power: 125 mW/channel
Wide gain range with programmable postamp
–4.5 dB to +43.5 dB
+7.5 dB to +55.5 dB
Low output-referred noise: 48 nV/√Hz typical
Active input impedance matching
Optimized for 10-/12-bit ADCs
Selectable output clamping level
Single 5 V supply operation
Available in space-saving chip scale package
APPLICATIONS
Ultrasound and sonar time-gain control
High performance AGC systems
I/Q signal processing
High speed dual ADC driver
GENERAL DESCRIPTION
The AD8331/AD8332 are single- and dual-channel ultralow
noise, linear-in-dB, variable gain amplifiers. Although optimized
for ultrasound systems, they are usable as low noise variable
gain elements at frequencies up to 120 MHz.
Each channel consists of an ultralow noise preamplifier (LNA),
an X-AMP® VGA with 48 dB of gain range, and a selectable gain
postamplifier with adjustable output limiting. The LNA gain is
19 dB with a single-ended input and differential outputs capable
of accurate, programmable active input impedance matching by
selecting an external feedback resistor. Active impedance
control optimizes noise performance for applications that
benefit from input matching.
The 48 dB gain range of the VGA makes these devices suitable
for a variety of applications. Excellent bandwidth uniformity is
maintained across the entire range. The gain control interface
provides precise linear-in-dB scaling of 50 dB/V for control
voltages between 40 mV and 1 V. Factory trim ensures excellent
part-to-part and channel-to-channel gain matching. Differential
signal paths lead to superb second and third order distortion
performance and low crosstalk.
FUNCTIONAL BLOCK DIAGRAM
LON1 LOP1 VIP1 VIN1
25
24
22
21
VPSV
15
VCM1
20
VCM2
9
HILO
19
VPS1 26
COM1 23
+19dB
INH1 27
LMD1 28
LNA 1
[(–48 to 0) + 21] dB
–
VGA 1
+
V_MID
3.5dB/15.5dB
POST
AMP1
17 VOH1
16 VOL1
BIAS
(VMID)
BIAS AND
INTERPOLATOR
GAIN
INT
10 GAIN
LMD2 1
INH2 2
–
LNA 2
+
VGA 2
POST
AMP2
VPS2 ³
COM2 ₆
4
5
7
8
LON2 LOP2 VIP2 VIN2
14
COMM
18
ENB
CLAMP
11
RCLMP
Figure 1. AD8332 Shown 28-Lead TSSOP
50
V_GAIN = 1V
40
0.8V
30
0.6V
20
0.4V
10
0.2V
0
0V
–10
13 VOL2
12 VOH2
–20
100k
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 2. Frequency Response vs. Gain
The VGA’s low output-referred noise is advantageous in driving
high speed differential ADCs. The gain of the postamplifier may
be pin selected to 3.5 dB or 15.5 dB to optimize gain range and
output noise for 12-bit or 10-bit converter applications. The
output may be limited to a user-selected clamping level,
preventing input overload to a subsequent ADC. An external
resistor adjusts the clamping level.
The operating temperature range is –40°C to +85°. The
AD8331 is available in a 20-lead QSOP package, and the
AD8332 in 28-lead TSSOP and 32-lead LFCSP packages. They
require a single 5 V supply, and the quiescent power
consumption is 125 mW/ch. A power-down (enable) pin is
provided.
Rev. C
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