AD825ARZ Datasheet, PDF (1/12 Pages) Analog Devices – Low Cost, General-Purpose High Speed JFET Amplifier

FEATURES
High speed
41 MHz, −3 dB bandwidth
125 V/µs slew rate
80 ns settling time
Input bias current of 20 pA and noise current of 10 fA/√Hz
Input voltage noise of 12 nV/√Hz
Fully specified power supplies: ±5 V to ±15 V
Low distortion: −76 dB at 1 MHz
High output drive capability
Drives unlimited capacitance load
50 mA min output current
No phase reversal when input is at rail
Available in 8-lead SOIC
APPLICATIONS
CCDs
Low distortion filters
Mixed gain stages
Audio amplifiers
Photo detector interfaces
ADC input buffers
DAC output buffers
GENERAL DESCRIPTION
The AD825 is a superbly optimized operational amplifier for
high speed, low cost, and dc parameters, making it ideally suited
for a broad range of signal conditioning and data acquisition
applications. The ac performance, gain, bandwidth, slew rate,
and drive capability are all very stable over temperature. The
AD825 also maintains stable gain under varying load
conditions.
The unique input stage has ultralow input bias current and
input current noise. Signals that go to either rail on this high
performance input do not cause phase reversals at the output.
These features make the AD825 a good choice as a buffer for
MUX outputs, creating minimal offset and gain errors.
The AD825 is fully specified for operation with dual ±5 V and
±15 V supplies. This power supply flexibility, and the low supply
current of 6.5 mA with excellent ac characteristics under all
supply conditions, makes the AD825 well-suited for many
demanding applications.
Low Cost, General-Purpose
High Speed JFET Amplifier
AD825
CONNECTION DIAGRAMS
NC 1
8 NC
–IN 2 ^AD825 7 +V_S
+IN
3
TOP VIEW
(Not to Scale)
6
OUTPUT
–V_S 4
5 NC
NC = NO CONNECT
Figure 1. 8-Lead Plastic SOIC (R) Package
NC 1
16 NC
NC 2
15 NC
NC 3
14 NC
–INPUT 4 AD825 13 +V_S
TOP VIEW
+INPUT 5 _{(Not to Scale)} 12 OUTPUT
–V_S 6
11 NC
NC 7
10 NC
NC 8
9 NC
NC = NO CONNECT
Figure 2. 16-Lead Plastic SOIC (R-16) Package
10V
200ns
10V
Figure 3. Performance with Rail-to-Rail Input Signals
Rev. F
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