AD8197B Datasheet, PDF (1/28 Pages) Analog Devices – 4:1 HDMI/DVI Switch with Equalization

4:1 HDMI/DVI Switch with Equalization
AD8197B
FEATURES
4 inputs, 1 output HDMI/DVI links
Enables HDMI 1.3-compliant receiver
Pin-to-pin compatible with the AD8197A
4 TMDS channels per link
Supports 250 Mbps to 2.25 Gbps data rates
Supports 25 MHz to 225 MHz pixel clocks
Equalized inputs allow use of long HDMI cables
(20 meters at 2.25 Gbps)
Fully buffered unidirectional inputs/outputs
Per input switchable, 50 Ω on-chip terminations
Switchable output 50 Ω on-chip terminations
Pre-emphasized outputs
Low added jitter
Single-supply operation (3.3 V)
4 auxiliary channels per link
Bidirectional unbuffered inputs/outputs
Flexible supply operation (3.3 V to 5 V)
HDCP standard compatible
Allows switching of DDC bus and 2 additional signals
Output disable feature
Reduced power dissipation
Removable output termination
Allows building of larger arrays
Two AD8197Bs support HDMI/DVI dual link
Standards compatible: HDMI receiver, HDCP, DVI
Serial (I²C slave) and parallel control interface
100-lead, 14 mm × 14 mm LQFP, Pb-free package
APPLICATIONS
Multiple input displays
Projectors
A/V receivers
Set-top boxes
Advanced television (HDTV) sets
TYPICAL APPLICATION
MEDIA CENTER
HDTV SET
GAME CONSOLE
SET-TOP BOX
HDMI
RECEIVER
AD8197B
DVD PLAYER
04:20
Figure 1. Typical HDTV Application
FUNCTIONAL BLOCK DIAGRAM
PARALLEL
SERIAL
2
2
I2C_SDA
I2C_SCL
I2C_ADDR[2:0]
3
VTTI
CONFIG
INTERFACE
RESET
CONTROL
LOGIC
AD8197B
AVCC
DVCC
AMUXVCC
AVEE
DVEE
IP_A[3:0] ⁺
IN_A[3:0] _–
IP_B[3:0] ⁺
IN_B[3:0] _–
IP_C[3:0] ⁺
IN_C[3:0] _–
IP_D[3:0] ⁺
IN_D[3:0] _–
4
4
4
4
4
4 _EQ
4
4
4
SWITCH
CORE
4
PE
HIGH SPEED BUFFERED
VTTO
+ _OP[3:0]
– ^ON[3:0]
VTTI
AUX_A[3:0]
AUX_B[3:0]
AUX_C[3:0]
AUX_D[3:0]
4
4
4
SWITCH
CORE
4
4
LOW SPEED UNBUFFERED
BIDIRECTIONAL
AUX_COM[3:0]
Figure 2.
GENERAL DESCRIPTION
The AD8197B is an HDMI™/DVI switch featuring equalized
TMDS® inputs and pre-emphasized TMDS outputs, ideal for
systems with long cable runs. The AD8197B offers individual
control of the on/off state of the TMDS input termination
resistors via I²C® control. Outputs can be set to a high
impedance state to reduce the power dissipation and/or to allow
the construction of larger arrays using the wire-OR technique.
The AD8197B is provided in a 100-lead LQFP, Pb-free, surface-
mount package, specified to operate over the −40°C to +85°C
temperature range.
PRODUCT HIGHLIGHTS
1. Supports data rates up to 2.25 Gbps, enabling 1080p deep
color (12-bit color) HDMI formats and greater than UXGA
(1600 × 1200) DVI resolutions.
2. Input cable equalizer enables use of long cables at the input
(more than 20 meters of 24 AWG cable at 2.25 Gbps).
3. Auxiliary switch routes a DDC bus and two additional signals
for a single-chip, HDMI 1.3 receive-compliant solution.
Rev. 0
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