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AD8196 Datasheet, PDF (1/24 Pages) Analog Devices – 2:1 HDMI/DVI Switch with Equalization
Preliminary Data Sheet
2:1 HDMI/DVI Switch with Equalization
AD8196
FEATURES
Two inputs, one output HDMI™/DVI links
Enables HDMI 1.3-compliant receiver
Pin-to-pin compatible with the AD8190
Four TMDS channels per link
Supports 250 Mbps to 2.25 Gbps data rates
Supports 25 MHz to 225 MHz pixel clocks
Equalized inputs for operation with long HDMI cables
(20 meters at 2.25Gbps)
Fully buffered unidirectional inputs/outputs
Globally switchable 50 Ω on-chip terminations
Pre-emphasized outputs
Low added jitter
Single-supply operation (3.3 V)
Four auxiliary channels per link
Bidirectional unbuffered inputs/outputs
Flexible supply operation (3.3 V to 5 V)
HDCP standard compatible
Allows switching of DDC bus and two additional signals
Output disable feature
Reduced power dissipation
Output termination removal
Two AD8196s support HDMI/DVI dual-link
Standards compliant: HDMI receiver, HDCP, DVI
Serial (I2C slave) control interface
56-lead, 8 mm x 8 mm, LFCSP, Pb-free package
APPLICATIONS
Multiple input displays
Projectors
A/V receivers
Set-top boxes
Advanced television (HDTV) sets
GENERAL DESCRIPTION
The AD8196 is an HDMI/DVI switch featuring equalized
TMDS inputs and pre-emphasized TMDS outputs, ideal for
systems with long cable runs. Outputs can be set to a high
impedance state to reduce the power dissipation and/or allow
the construction of larger arrays using the wire-OR technique.
The AD8196 is provided in a space saving, 56-lead, LFCSP,
surface-mount, Pb-free, plastic package and is specified to
operate over the −40°C to +85°C temperature range.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
TYPICAL APPLICATION
Figure 2. Typical AD8196 Application for HDTV Sets
PRODUCT HIGHLIGHTS
1. Supports data rates up to 2.25 Gbps, enabling greater than
1080p HDMI formats with deep color, and UXGA (1600 ×
1200) DVI resolutions.
2. Input cable equalizer enables use of long cables at the
input (more than 20 meters of 24 AWG cable at 2.25Gbps).
3. Auxiliary switch allows routing of the DDC bus and two
additional single-ended signals for a single chip, HDMI 1.3
receive-compliant solution.
PrA
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