AD8016AREZ Datasheet, PDF (1/21 Pages) Analog Devices – Low Power, High Output

Data Sheet
FEATURES
xDSL line driver that features full ADSL central office (CO)
Performance on ±12 V supplies
Low power operation
±5 V to ±12 V voltage supply
12.5 mA/amp (typical) total supply current
Power reduced keep alive current of 4.5 mA/amp
High output voltage and current drive
IOUT = 600 mA
40 V p-p differential output voltage RL = 50 Ω, VS = ±12 V
Low single-tone distortion
–75 dBc @ 1 MHz SFDR, RL = 100 Ω, VOUT = 2 V p-p
MTPR = –75 dBc, 26 kHz to 1.1 MHz, ZLINE = 100 Ω,
PLINE = 20.4 dBm
High Speed
78 MHz bandwidth (–3 dB), G = +5
40 MHz gain flatness
1000 V/μs slew rate
GENERAL DESCRIPTION
The AD8016 high output current dual amplifier is designed for
the line drive interface in Digital Subscriber Line systems such
as ADSL, HDSL2, and proprietary xDSL systems. The drivers
are capable, in full-bias operation, of providing 24.4 dBm
output power into low resistance loads, enough to power a
20.4 dBm line, including hybrid insertion loss.
The AD8016 is available in a low cost 24-lead SOIC_W_BAT
and a 28-lead TSSOP_EP with an exposed lead frame (ePAD).
Operating from ±12 V supplies, the AD8016 requires only 1.5 W
of total power dissipation (refer to the Power Dissipation section
for details) while driving 20.4 dBm of power downstream using
Low Power, High Output
Current xDSL Line Driver
AD8016
PIN CONFIGURATIONS
+V1 1
24 +V2
V_OUT1 2
V_INN1 3
V_INP1 4
AGND 5
AGND 6
AGND 7
AGND 8
23 V_OUT2
+–
22 V_INN2
21 V_INP2
20 AGND
AD8016 _{19 AGND}
TOP VIEW
(Not to Scale) ^{18 AGND}
17 AGND
PWDN0 9
16 PWDN1
DGND 10
15 BIAS
–V1 11
14 –V2
NC 12
13 NC
NC = NO CONNECT
Figure 1. 24-Lead SOIC_W_BAT (RB-24)
NC 1
NC 2
NC 3
+V_IN2 4
–V_IN2 5
V_OUT2 6
+V2 7
+V1 8
V_OUT1 9
–V_IN1 10
+V_IN1 11
NC 12
NC 13
NC 14
AD8016ARE
TOP VIEW
(Not to Scale)
28 NC
27 NC
26 NC
25 NC
24 PWDN1
23 BIAS
22 –V2
21 –V1
20 DGND
19 NC
18 PWDN0
17 NC
16 NC
15 NC
NOTES
1. THE EXPOSED PADDLE IS FLOATING,
NOT ELECTRICALLY CONNECTED
INTERNALLY.
2. NC = NO CONNECT.
Figure 2. 28-Lead TSSOP_EP (RE-28-1)
the xDSL hybrid in Figure 35 and Figure 36. Two digital bits
(PWDN0, PWDN1) allow the driver to be capable of full
performance, an output keep-alive state, or two intermediate
bias states. The keep-alive state biases the output transistors
enough to provide a low impedance at the amplifier outputs
for back termination.
The low power dissipation, high output current, high output
voltage swing, flexible power-down, and robust thermal
packaging enable the AD8016 to be used as the central office
(CO) terminal driver in ADSL, HDSL2, VDSL, and proprietary
xDSL systems.
Rev. C
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