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AD7887 Datasheet, PDF (1/16 Pages) Analog Devices – +2.7 V to +5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC
a +2.7 V to +5.25 V, Micropower, 2-Channel,
125 kSPS, 12-Bit ADC in 8-Lead ␮SOIC
AD7887
FEATURES
Specified for VDD of +2.7 V to +5.25 V
Flexible Power/Throughput Rate Management
Shutdown Mode: 1 ␮A Max
One/Two Single-Ended Inputs
Serial Interface: SPI™/QSPI™/MICROWIRE™/DSP
Compatible
8-Lead Narrow SOIC and ␮SOIC Packages
APPLICATIONS
Battery-Powered Systems (Personal Digital Assistants,
Medical Instruments, Mobile Communications)
Instrumentation and Control Systems
High Speed Modems
FUNCTIONAL BLOCK DIAGRAM
AIN0
VREF/
AIN1
VDD
I/P
MUX
T/H
AD7887
VREF/AIN1
SOFTWARE
CONTROL
LATCH
2.5V
REF
BUF
CHARGE
REDISTRIBUTION
DAC
COMP
GND
GENERAL DESCRIPTION
The AD7887 is a high speed, low power, 12-bit ADC that oper-
ates from a single +2.7 V to +5.25 V power supply. The AD7887
is capable of 125 kSPS throughput rate. The input track-and-
hold acquires a signal in 500 ns and features a single-ended
sampling scheme. The output coding for the AD7887 is straight
binary and the part is capable of converting full power signals up to
2.5 MHz.
The AD7887 can be configured for either dual or single chan-
nel operation, via the on-chip Control Register. There is a
default single-channel mode that allows the AD7887 to be
operated as a read-only ADC. In single-channel operation,
there is one analog input (AIN0) with the VREF/AIN1 pin as-
suming its VREF function. This VREF pin allows the user access
to the part’s internal +2.5 V reference, or the VREF pin can be
overdriven by an external reference to provide the reference
voltage for the part. This external reference voltage has a range
of +2.5 V to VDD. The analog input range on AIN0 is 0 to +VREF.
In dual-channel operation, the VREF/AIN1 pin assumes its AIN1
function, providing a second analog input channel. In this case,
the reference voltage for the part is provided via the VDD pin. As
a result, the input voltage range on both the AIN0 and AIN1
inputs is 0 to VDD.
SAR + ADC
CONTROL LOGIC
SPORT
DIN
CS DOUT SCLK
CMOS construction ensures low power dissipation of typically
2 mW for normal operation and 3 µW in power-down mode.
The part is available in an 8-lead, 0.15-inch-wide narrow body
SOIC and an 8-lead µSOIC package.
PRODUCT HIGHLIGHTS
1. Smallest 12-bit dual/single-channel ADC; 8-lead µSOIC
package.
2. Lowest power 12-bit dual/single-channel ADC.
3. Flexible power management options including automatic
power-down after conversion.
4. Read-Only ADC capability.
5. Analog input range from 0 V to VREF.
6. Versatile serial I/O port (SPI/QSPI/MICROWIRE/DSP
compatible).
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999