AD7731 Datasheet, PDF (1/44 Pages) Analog Devices – Low Noise, High Throughput 24-Bit Sigma-Delta ADC

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FEATURES
24-Bit Sigma-Delta ADC
16 Bits p-p Resolution at 800 Hz Output Rate
Programmable Output Rates up to 6.4 kHz
Programmable Gain Front End
؎0.0015% Nonlinearity
Buffered Differential Inputs
Programmable Filter Cutoffs
FASTStep™* Mode for Channel Sequencing
Single Supply Operation
APPLICATIONS
Process Control
PLCs/DCS
Industrial Instrumentation
Low Noise, High Throughput
24-Bit Sigma-Delta ADC
AD7731
GENERAL DESCRIPTION
The AD7731 is a complete analog front-end for process control
applications. The device has a proprietary programmable gain
front end that allows it to accept a range of input signal ranges,
including low level signals, directly from a transducer. The sigma-
delta architecture of the part consists of an analog modulator
and a low pass programmable digital filter, allowing adjustment
of filter cutoff, output rate and settling time.
The part features three buffered differential programmable gain
analog inputs (which can be configured as five pseudo-differential
inputs), as well as a differential reference input. The part oper-
ates from a single +5 V supply and accepts seven unipolar ana-
log input ranges: 0 to +20 mV, +40 mV, +80 mV, +160 mV,
+320 mV, +640 mV and +1.28 V, and seven bipolar ranges:
± 20 mV, ± 40 mV, ± 80 mV, ± 160 mV, ± 320 mV, ± 640 mV and
± 1.28 V. The peak-to-peak resolution achievable directly from
the part is 16 bits at an 800 Hz output rate. The part can switch
between channels with 1 ms settling time and maintain a perfor-
mance level of 13 bits of peak-to-peak resolution.
The serial interface on the part can be configured for three-wire
operation and is compatible with microcontrollers and digital
signal processors. The AD7731 contains self-calibration and
system calibration options and features an offset drift of less
than 5 nV/°C and a gain drift of less than 2 ppm/°C.
The part is available in a 24-lead plastic DIP, a 24-lead SOIC
and 24-lead TSSOP package.
FUNCTIONAL BLOCK DIAGRAM
NC
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AV_DD
DV_DD
REF IN(–) REF IN(+)
AV_DD
100nA BUFFER
MUX
PGA
AD7731
SIGMA-DELTA A/D CONVERTER
SIGMA-
DELTA
MODULATOR
PROGRAMMABLE
DIGITAL
FILTER
100nA
AGND
SERIAL INTERFACE
AND CONTROL LOGIC
CLOCK
GENERATION
REGISTER BANK
CALIBRATION
MICROCONTROLLER
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
AGND
DGND
POL
RDY
RESET
*FASTStep is a trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 1997