AD7705_06 Datasheet, PDF (1/44 Pages) Analog Devices – 3 V/5 V, 1 mW, 2-/3-Channel, 16-Bit, Sigma-Delta ADCs

FEATURES
AD7705: 2 fully differential input channel ADCs
AD7706: 3 pseudo differential input channel ADCs
16 bits no missing codes
0.003% nonlinearity
Programmable gain front end: gains from 1 to 128
3-wire serial interface
SPI®-, QSPI™-, MICROWIRE™-, and DSP-compatible
Schmitt-trigger input on SCLK
Ability to buffer the analog input
2.7 V to 3.3 V or 4.75 V to 5.25 V operation
Power dissipation 1 mW maximum @ 3 V
Standby current 8 μA maximum
16-lead PDIP, 16-lead SOIC, and 16-lead TSSOP packages
GENERAL DESCRIPTION
The AD7705/AD7706 are complete analog front ends for low
frequency measurement applications. These 2-/3-channel devices
can accept low level input signals directly from a transducer and
produce serial digital output. The devices employ a Σ-Δ
conversion technique to realize up to 16 bits of no missing codes
performance. The selected input signal is applied to a
proprietary, programmable-gain front end based around an
analog modulator. The modulator output is processed by an on-
chip digital filter. The first notch of this digital filter can be pro-
grammed via an on-chip control register, allowing adjustment of
the filter cutoff and output update rate.
The AD7705/AD7706 devices operate from a single 2.7 V to
3.3 V or 4.75 V to 5.25 V supply. The AD7705 features two fully
differential analog input channels; the AD7706 features three
pseudo differential input channels.
Both devices feature a differential reference input. Input signal
ranges of 0 mV to 20 mV through 0 V to 2.5 V can be
incorporated on both devices when operating with a VDD of 5 V
and a reference of 2.5 V. They can also handle bipolar input
signal ranges of ±20 mV through ±2.5 V, which are referenced to
the AIN(−) inputs on the AD7705 and to the COMMON input
on the AD7706.
3 V/5 V, 1 mW, 2-/3-Channel,
16-Bit, Sigma-Delta ADCs
AD7705/AD7706
ANALOG
INPUT
CHANNELS
FUNCTIONAL BLOCK DIAGRAM
V_DD
REF IN(–) REF IN(+)
AD7705/AD7706
MAX
BUFFER
PGA
CHARGE
BALANCING
A/D CONVERTER
Σ -Δ
MODULATOR
A = 1 ≈ 128
DIGITAL FILTER
MCLK IN
MCLK OUT
CLOCK
GENERATION
SERIAL INTERFACE
REGISTER BANK
SCLK
CS
DIN
DOUT
GND
DRDY RESET
Figure 1.
The AD7705/AD7706 devices, with a 3 V supply and a 1.225 V
reference, can handle unipolar input signal ranges of 0 mV to
10 mV through 0 V to 1.225 V. The devices can accept bipolar
input ranges of ±10 mV through ±1.225 V. Therefore, the
AD7705/AD7706 devices perform all signal conditioning and
conversion for a 2-channel or 3-channel system.
The AD7705/AD7706 are ideal for use in smart, microcontroller,
or DSP-based systems. The devices feature a serial interface that
can be configured for 3-wire operation. Gain settings, signal
polarity, and update rate selection can be configured in software
using the input serial port. The parts contains self-calibration and
system calibration options to eliminate gain and offset errors on
the part itself or in the system. CMOS construction ensures very
low power dissipation, and the power-down mode reduces the
standby power consumption to 20 μW typ.
These parts are available in a 16-lead, wide body (0.3 inch),
plastic dual in-line package (DIP); a 16-lead, wide body
(0.3 inch), standard small outline (SOIC) package; and a low
profile, 16-lead, thin shrink small outline package (TSSOP).
Rev. C
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