AD7680 Datasheet, PDF (1/11 Pages) Analog Devices – 3mW, 100kSPS,16-Bit ADC in 6 Lead SOT-23

PRELIMINARY TECHNICAL DATA
a
3mW, 100kSPS,
16-Bit ADC in 6 Lead SOT-23
Preliminary Technical Data
AD7680
FEATURES
Fast Throughput Rate: 100kSPS
Specified for V_DD of 2.5 V to 5.25 V
Low Power:
2.5mW typ at 100kSPS with 3V Supplies
15mW typ at 100kSPS with 5V Supplies
Wide Input Bandwidth:
85dB SNR at 10kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface
SPI/QSPI/µWire/DSP Compatible
Standby Mode: 0.5 µA max
6-Lead SOT-23, and 8-Lead MSOP Packages
APPLICATIONS
Battery-Powered Systems
Personal Digital Assistants
Medical Instruments
Mobile Communications
Instrumentation and Control Systems
Remote Data Acquisition Systems
High-Speed Modems
Optical Sensors
GENERAL DESCRIPTION
The AD7680 is a 16-bit, fast, low power, successive-ap-
proximation ADC. The part operates from a single 2.5 V
to 5.25 V power supply and features throughput rates up
to 100kSPS. The part contains a low-noise, wide band-
width track/hold amplifier which can handle input fre-
quencies in excess of 100kHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to
interface with microprocessors or DSPs. The input signal
is sampled on the falling edge of CS and the conversion is
also initiated at this point. There are no pipelined delays
associated with the part.
The AD7860 uses advanced design techniques to achieve
very low-power dissipation at fast throughput rates.
The reference for the part is taken internally from V_DD.
This allows the widest dynamic input range to the ADC.
Thus the analog input range for the part is 0 to V_DD. The
conversion rate is determined by the SCLK frequency.
FUNCTIONAL BLOCK DIAGRAM
VDD
16-BIT SUCCESSIVE
VIN
T/H
APPROXIMATION
ADC
AD7680
CONTROL LOGIC
SCLK
SDATA
+5
GND
PRODUCT HIGHLIGHTS
1. First 16-Bit ADC in a SOT-23 package.
2. High Throughput with Low Power Consumption
3. Flexible Power/Serial Clock Speed Management
The conversion rate is determined by the serial clock
allowing the conversion time to be reduced through the
serial clock speed increase. This allows the average power
consumption to be reduced when a powerdown mode is
used while not converting. The part also features a shut-
down mode to maximize power efficiency at lower
throughput rates. Power consumption is 0.5µA max
when in shutdown.
4. Reference derived from the power supply.
5. No Pipeline Delay
The part features a standard successive-approximation
ADC with accurate control of the sampling instant via a
CS input and once off conversion control.
REV. PrE 11/02
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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Analog Devices, Inc., 2002