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AD7568BSZ Datasheet, PDF (1/14 Pages) Analog Devices – LC2MOS Octal 12-Bit DAC
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LC2MOS
Octal 12-Bit DAC
AD7568
FEATURES
Eight 12-Bit DACs in One Package
4-Quadrant Multiplication
Separate References
Single +5 V Supply
Low Power: 1 mW
Versatile Serial Interface
Simultaneous Update Capability
Reset Function
44-Pin PQFP and PLCC
APPLICATIONS
Process Control
Automatic Test Equipment
General Purpose Instrumentation
GENERAL DESCRIPTION
The AD7568 contains eight 12-bit DACs in one monolithic de-
vice. The DACs are standard current output with separate VREF,
IOUT1, IOUT2 and RFB terminals.
The AD7568 is a serial input device. Data is loaded using
FSIN, CLKIN and SDIN. One address pin, A0, sets up a de-
vice address, and this feature may be used to simplify device
loading in a multi-DAC environment.
All DACs can be simultaneously updated using the asynchro-
nous LDAC input and they can be cleared by asserting the
asynchronous CLR input.
The AD7568 is housed in a space-saving 44-pin plastic quad
flatpack and 44-lead PLCC.
FUNCTIONAL BLOCK DIAGRAM
VDD AGND DGND VREFD VREFC VREF B VREFA R FB A
AD7568
INPUT
DAC A
LATCH A 12
LATCH
12
INPUT
12
LATCH B
DAC B
LATCH
12
INPUT
LATCH C 12
DAC C
LATCH
12
INPUT
DAC D
LATCH D 12
LATCH
12
INPUT
DAC E
LATCH E 12 LATCH
12
INPUT
DAC F
12
12
LATCH F
LATCH
INPUT
DAC G
12
12
LATCH G
LATCH
INPUT
DAC H
LATCH H 12 LATCH
12
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
DAC G
DAC H
I OUT1A
I OUT2A
RFB B
I OUT1B
IOUT2B
RFB C
I OUT1C
I OUT2C
R FBD
I OUT1D
IOUT2D
RFBE
I OUT1E
I OUT2E
RFBF
IOUT1F
IOUT2F
RFBG
I OUT1G
I OUT2G
R FBH
I OUT1H
I OUT2H
FSIN
CLKIN
SDIN
CONTROL LOGIC
+
INPUT SHIFT
REGISTER 12
A0
SDOUT
LDAC CLR VREF E VREF F VREF G VREF H
PIN CONFIGURATIONS
Plastic Quad Flatpack
Plastic Leaded Chip Carrier
NC 1
VREF F 2
R FB F 3
IOUT1F 4
IOUT2F 5
VREF G 6
R FB G 7
IOUT1G 8
IOUT2G 9
VREF H 10
R FB H 11
PIN 1 IDENTIFIER
AD7568 PQFP
TAODP 7VI5E6W8
NoTtOtoP SVcIEaWle
(Not to Scale)
33 NC
32 VREFC
31 RFB C
30 IOUT1C
29 IOUT2C
28 VREFB
27 RFB B
26 IOUT1B
25 IOUT2B
24 VREFA
23 R FB A
REV. C
NC = NO CONNECT
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
6 5 4 3 2 1 44 43 42 41 40
NC 7
VREF F 8
RFB F 9
IOUT1 F 10
IOUT2 F 11
VREF G 12
RFB G 13
IOUT1 G 14
IOUT2 G 15
VREF H 16
RFB H 17
AD7568 PLCC
TOP VIEW
(Not to Scale)
39 NC
38 VREF C
37 RFB C
36 IOUT1 C
35 IOUT2 C
34 VREF B
33 RFB B
32 IOUT1 B
31 IOUT2 B
30 VREF A
29 RFB A
18 19 20 21 22 23 24 25 26 27 28
NC = NO CONNECT
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