AD7376 Datasheet, PDF (1/12 Pages) Analog Devices – +-15 V Operation Digital Potentiometer

a
؎15 V Operation
Digital Potentiometer
AD7376*
FEATURES
128 Position
Potentiometer Replacement
10 k⍀, 50 k⍀, 100 k⍀, 1 M⍀
Power Shutdown: Less than 1 ␮A
3-Wire SPI Compatible Serial Data Input
+5 V to +30 V Single Supply Operation
؎5 V to ؎15 V Dual Supply Operation
Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Programmable Filters, Delays, Time Constants
Line Impedance Matching
Power Supply Adjustment
GENERAL DESCRIPTION
The AD7376 provides a single channel, 128-position digitally-
controlled variable resistor (VR) device. This device performs the
same electronic adjustment function as a potentiometer or vari-
able resistor. These products were optimized for instrument and
test equipment applications where a combination of high voltage
with a choice between bandwidth or power dissipation are avail-
able as a result of the wide selection of end-to-end terminal resis-
tance values. The AD7376 contains a fixed resistor with a wiper
contact that taps the fixed resistor value at a point determined by
a digital code loaded into the SPI-compatible serial-input regis-
ter. The resistance between the wiper and either endpoint of the
fixed resistor varies linearly with respect to the digital code trans-
ferred into the VR latch. The variable resistor offers a completely
programmable value of resistance between the A terminal and the
wiper or the B terminal and the wiper. The fixed A to B terminal
resistance of 10 kΩ, 50 kΩ, 100 kΩ or 1 MΩ has a nominal tem-
perature coefficient of –300 ppm/°C.
The VR has its own VR latch which holds its programmed resis-
tance value. The VR latch is updated from an internal serial-to-
parallel shift register which is loaded from a standard 3-wire
serial-input digital interface. Seven data bits make up the data
word clocked into the serial data input register (SDI). Only the
last seven bits of the data word loaded are transferred into the
7-bit VR latch when the CS strobe is returned to logic high. A
serial data output pin (SDO) at the opposite end of the serial
register allows simple daisy-chaining in multiple VR applications
without additional external decoding logic.
The reset (RS) pin forces the wiper to the midscale position by
loading 40_H into the VR latch. The SHDN pin forces the resistor
*Patent Number: 5495245
FUNCTIONAL BLOCK DIAGRAM
AD7376
V_DD
SDO
SDI
CLK
CS
Q
A
7-BIT
7
7-BIT ⁷
SERIAL
LATCH
W
REGISTER
B
D
CK
R
SHDN
V_SS
GND
RS
SHDN
to an end-to-end open circuit condition on the A terminal and
shorts the wiper to the B terminal, achieving a microwatt power
shutdown state. When shutdown is returned to logic high, the
previous latch settings put the wiper in the same resistance
setting prior to shutdown as long as power to V_DD is not re-
moved. The digital interface is still active in shutdown so that
code changes can be made that will produce a new wiper posi-
tion when the device is taken out of shutdown.
The AD7376 is available in both surface mount (SOL-16) and
the 14-lead plastic DIP package. For ultracompact solutions
selected models are available in the thin TSSOP package. All
parts are guaranteed to operate over the extended industrial
temperature range of –40°C to +85°C. For operation at lower
supply voltages (+3 V to +5 V), see the AD8400/AD8402/
AD8403 products.
SDI ¹
(DATA IN)
0
SDO ¹
(DATA OUT) ₀
1
CLK
0
t _CSH0
1
CS
0
V_DD
V_OUT
0V
D_X
D'_X
D_X
t _DS
t _DH
D'_X
t _CH
t _CSS
t _CL
t _CSH
t_{PD_MAX}
t _CS1
t _CSW
t_S
؎1 LSB ERROR BAND
Figure 1. Detail Timing Diagram
؎1 LSB
The last seven data bits clocked into the serial input register will
be transferred to the VR 7-bit latch when CS returns to logic
high. Extra data bits are ignored.
REV. 0
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© Analog Devices, Inc., 1997