AD73322L_15 Datasheet, PDF (1/48 Pages) Analog Devices – Low Cost, Low Power CMOS General-Purpose Dual Analog Front End

Low Cost, Low Power CMOS
General-Purpose Dual Analog Front End
AD73322L
FEATURES
Two 16-bit A/D converters
Two 16-bit D/A converters
Programmable input/output sample rates
78 dB ADC SNR
78 dB DAC SNR
64 kHz maximum sample rate
−90 dB crosstalk
Low group delay (25 µs typ per ADC channel, 50 µs typ per
DAC channel)
Programmable input/output gain
Flexible serial port allows up to 4 dual codecs to be
connected in cascade, giving 8 I/O channels
Single-supply operation (2.7 V to 3.3 V)
50 mW typ power consumption at 3.0 V
Temperature range: −40°C to +105°C
On-chip reference
28-lead SOIC, TSSOP, and 44-lead LQFP packages
APPLICATIONS
General-purpose analog I/O
Speech processing
Cordless and personal communications
Telephony
Active control of sound and vibration
Data communications
Wireless local loop
GENERAL DESCRIPTION
The AD73322L is a dual front-end processor for general-
purpose applications, including speech and telephony. It
features two 16-bit A/D conversion channels and two 16-bit
D/A conversion channels. Each channel provides 78 dB signal-
to-noise ratio over a voice-band signal bandwidth. It also
features an input-to-output gain network in both the analog
and digital domains. This is featured on both codecs and can
be used for impedance matching or scaling when interfacing to
subscriber line interface circuits (SLICs).
The AD73322L is particularly suitable for a variety of appli-
cations in the speech and telephony area, including low bit rate,
high quality compression, speech enhancement, recognition,
and synthesis. The low group delay characteristic of the part
makes it suitable for single or multichannel active control
applications.
Rev. A
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VFBP1
VINP1
VINN1
VFBN1
VOUTP1
VOUTN1
REFOUT
REFCAP
VFBP2
VINP2
VINN2
VFBN2
VOUTP2
VOUTN2
FUNCTIONAL BLOCK DIAGRAM
AVDD1 AVDD2 DVDD
AD73322L
ADC CHANNEL 1
SDI
SDIFS
DAC CHANNEL 1
REFERENCE
ADC CHANNEL 2
SPORT
SCLK
SE
RESET
MCLK
DAC CHANNEL 2
SDOFS
SDO
AGND1 AGND2 DGND
Figure 1.
The A/D and D/A conversion channels feature programmable
input/output gains with ranges of 38 dB and 21 dB, respectively.
An on-chip reference voltage allows single-supply operation.
The sampling rate of the codecs is programmable with four
separate settings offering 64 kHz, 32 kHz, 16 kHz, and 8 kHz
sampling rates (from a master clock of 16.384 MHz).
A serial port (SPORT) allows easy interfacing of single or
cascaded devices to industry-standard DSP engines. The
SPORT transfer rate is programmable to allow interfacing to
both fast and slow DSP engines.
The AD73322L is available in 28-lead SOIC, 28-lead TSSOP,
and 44-lead LQFP packages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
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