AD6121_15 Datasheet, PDF (1/16 Pages) Analog Devices – CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator

a
CDMA 3 V Receiver IF Subsystem
with Integrated Voltage Regulator
AD6121
FEATURES
GENERAL DESCRIPTION
Fully Compliant with IS98A and PCS Specifications
The AD6121 is a low power receiver IF subsystem specifically
CDMA, W-CDMA, AMPS, and TACS Operation
designed for CDMA applications. It consists of high dynamic
Linear IF Amplifier
range IF amplifiers with voltage controlled gain, a divide-by-two
5.9 dB Noise Figure
quadrature generator, an I and Q demodulator, and a power-
–47.5 dB to +47 dB Linear-in-dB Gain Control
down control input. An integral low dropout regulator allows
Quadrature Demodulator
operation from battery voltages from 2.9 V to 4.2 V.
Demodulates IFs from 50 MHz to 350 MHz
Integral Low Dropout Regulator
200 mV Voltage Drop
Accepts 2.9 V to 4.2 V Input from Battery
Low Power
10 mA at Midgain
E _{<1 ␮A Sleep Mode Operation}
Companion Transmitter IF Chip Available (AD6122)
APPLICATIONS
T _{CDMA, W-CDMA, AMPS, and TACS Operation}
QPSK Receivers
The gain control input accepts an external gain control voltage
input from a DAC. It provides 94.5 dB of gain control with a
nominal 52.5 dB/V scale factor when using an internal voltage
reference. The gain control interface reference input can be
connected to either the internal reference or an external reference.
The I and Q demodulator provides differential quadrature base-
band outputs to interface with CDMA baseband converters. A
divide-by-two quadrature generator followed by dual polyphase
filters ensures maximum ± 2.5° quadrature accuracy.
The AD6121 IF Subsystem is fabricated using a 25 GHz f_t
BiCMOS silicon process and is packaged in a 28-lead SSOP
and a 32-leadless LPCC chip scale package (5 mm × 5 mm).
E _{FUNCTIONAL BLOCK DIAGRAM}
ROOFING
L_FILTER
O _CDMA
INPUT
S _FM
OB ^INPUT
IF
OUTPUT
DEMODULATOR
INPUT
IF AMPLIFIERS
INPUT STAGE
PTAT
TEMPERATURE
COMPENSATION
I
2
Q
AD6121
QUADRATURE DEMODULATOR
IOUT
IOUT
LOCAL
OSCILLATOR
INPUT
QOUT
QOUT
GAIN CONTROL
SCALE FACTOR
VREG
LOW
DROPOUT
REGULATOR
VPOS
CDMA/FM
GAIN
POWER- POWER-
SELECT
CONTROL
VOLTAGE
INPUT
GAIN
1.23V ^{DOWN 2 DOWN 1}
CONTROL REFERENCE
VOLTAGE OUTPUT
REFERENCE
INPUT
REV. B
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