AD5933 Datasheet, PDF (1/20 Pages) Analog Devices – 1 MSPS 12-Bit Impedance Converter, Network Analyzer

Preliminary Technical Data
1 MSPS 12-Bit Impedance Converter,
Network Analyzer
AD5933
FEATURES
50KHz Max Excitation Output
Impedance Range .1k-20M, 12 Bit Resolution
Selectable System Clock from the following:
PLL, RC Oscillator, External Clock
DSP Real and Imaginary Calculation (FFT)
3V Power Supply,
Programmable Sinewave Output
Frequency Resolution 27 Bits (<0.1Hz)
Frequency Sweep Capability
12 Bit Sampling ADC
ADC Sampling 1MSPS, INL +/- 1LSB Max.
On Chip Temp Sensor allows +/-2 oC accuracy
Serial ^I2C Loading
Temperature Range –40-125oC 16 SSOP
APPLICATIONS
Complex Impedance Measurement
Impedance Spectrometry
Biomedical and Automotive Sensors
Proximity Sensors
FFT Processing
GENERAL DESCRIPTION
The AD5933 is a high precision impedance converter system
solution which combines an on board frequency generator with
a 12 Bit 1MSPS ADC. The frequency generator allows an
external complex impedance to be excited with a known
frequency. The response signal from the impedance is sampled
by the on board ADC and FFT processed by an on-board DSP
engine. The FFT algorithm returns a Real (R) and Imaginary (I)
data word, allowing impedance to be conveniently calculated.
The impedance magnitude and phase is easily calculated using
the following equations:
22
Magnitude = R + I
-1
Phase = Tan (I/R)
MCLK
To determine the actual real impedance value Z(W) , generally a
frequency sweep is performed. The impedance can be
calculated at each point and a frequency vs magnitude plot can
be created.
The system allows the user to program a 2V PK-PK sinusoidal
signal as excitation to an external load. Output ranges of 1V,
500mV, 200mV can also be programmed. The signal is
provided on chip using DDS techniques. Frequency resolution
of 27 bits (less than 0.1HZ) can be achieved. The clock for the
DDS can be generated from an external reference clock, an
internal RC oscillator or an internal PLL. The PLL has a gain
stage of 512 and typically needs a reference clock of 32KHz on
the MCLK pin.
To perform the frequency sweep, the user must first program
the conditions required for the sweep; start frequency, delta
frequency, step frequency, etc. A Start Command is then
required to begin the sweep.
At each point on the sweep the ADC will take 1024 samples and
calculate a Discrete Fourier Transform to provide the real and
imaginary data for the waveform. The real and imaginary data
is available to the user through the 12C interface.
To determine the impedance of the load at any one frequency
point, Z(w), a measurement system comprised of a trans
impedance amplifier, gain stage and ADC are used to record
data. The gain stage for the response stage is 1 or 5.
The ADC is a low noise, high speed 1MSPS sampling ADC that
operates from a 3V supply. Clocking for both the DDS and
ADC signals is provided externally via the MCLK reference
clock, which is provided externally from a crystal oscillator. The
AD5933 is available in a 16 ld SSOP.
PLL
RC Osc
Digital Control
Logic
I2C Interface
DDS CORE
(27 Bits)
÷4
÷4
1024 POINT DFT
REAL DATA 16Bits
IMAGE DATA 16Bits
ADC
(12Bit)
DAC
G=1/0.5/0.2/0.1
G=1/5
VB
INTERNAL
BANDGAP
REFERENCE
TEMP
SENSOR
VOUT = 2V (G=1)
Z(w)
Rfb
SCL SDA
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
www.analog.com
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.