AD5544ARSZ Datasheet, PDF (1/28 Pages) Analog Devices – Quad, Current-Output, Serial-Input 16-/14-Bit DACs

Data Sheet
FEATURES
AD5544: 16-bit resolution
INL of ±1 LSB (B Grade)
AD5554: 14-bit resolution
INL of ±0.5 LSB (B Grade)
2 mA full-scale current ± 20%, with V_REF = ±10 V
0.9 µs settling time to ±0.1%
12 MHz multiplying bandwidth
Midscale glitch of −1 nV-sec
Midscale or zero-scale reset
4 separate, 4-quadrant multiplying reference inputs
SPI-compatible, 3-wire interface
Double-buffered registers enable
Simultaneous multichannel change
Internal power-on reset
Temperature range: −40°C to +125°C
Compact 28-lead SSOP and 32-lead LFCSP
APPLICATIONS
Automatic test equipment
Instrumentation
Digitally controlled calibration
GENERAL DESCRIPTION
The AD5544/AD5554 quad, 16-/14-bit, current output, digital-
to-analog converters (DACs) are designed to operate from a
2.7 V to 5.5 V supply range.
The applied external reference input voltage (V_REFx) determines
the full-scale output current. Integrated feedback resistors (R_FB)
provide temperature-tracking, full-scale voltage outputs when
combined with an external I-to-V precision amplifier.
A double-buffered serial data interface offers high speed, 3-wire,
SPI- and microcontroller-compatible inputs using serial data in
(SDI), a chip select (CS), and clock (CLK) signals. In addition,
a serial data out pin (SDO) allows for daisy-chaining when multiple
packages are used. A common, level-sensitive, load DAC strobe
(LDAC) input allows the simultaneous update of all DAC outputs
from previously loaded input registers. Additionally, an internal
power-on reset forces the output voltage to 0 at system turn-on.
The MSB pin allows system reset assertion (RS) to force all registers
to zero code when MSB = 0 or to half-scale code when MSB = 1.
Quad, Current-Output,
Serial-Input 16-/14-Bit DACs
AD5544/AD5554
FUNCTIONAL BLOCK DIAGRAM
V_REFA B C D
SDI
SDO
CS
CLK
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9 16
D10
D11
D12
D13
D14
D15
A0
A1
INPUT
REGISTER R
INPUT
REGISTER R
INPUT
REGISTER R
EN
DAC A
B
C
D
2:4
DECODE
INPUT
REGISTER R
POWER-ON
RESET
DAC A
REGISTER R
DAC A
DAC B
REGISTER R
DAC B
DAC C
REGISTER R
DAC C
DAC D
REGISTER R
DAC D
AD5544
DGND
RS MSB
LDAC
V_SS
Figure 1.
V_DD
R_FBA
I_OUTA
A_GNDA
R_FBB
I_OUTB
A_GNDB
R_FBC
I_OUTC
A_GNDC
R_FBD
I_OUTD
A_GNDD
A_GNDF
The AD5544 is packaged in the compact 28-lead SSOP and 32-
lead LFCSP. The AD5554 is packed in the compact 28-lead SSOP.
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
0
10,000 20,000 30,000 40,000 50,000 60,000 70,000
CODE
Figure 2. AD5544 INL vs. Code Plot (T_A = 25°C)
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
www.analog.com
Fax: [phone] ©2000–2012 Analog Devices, Inc. All rights reserved.