AD5392_15 Datasheet, PDF (1/44 Pages) Analog Devices – 8-/16-Channel, 3 V/5 V, Serial Input, Single-Supply, 12-/14-Bit Voltage Output

Data Sheet
8-/16-Channel, 3 V/5 V, Serial Input,
Single-Supply, 12-/14-Bit Voltage Output
AD5390/AD5391/AD5392
FEATURES
AD5390: 16-channel, 14-bit voltage output DAC
AD5391: 16-channel, 12-bit voltage output DAC
AD5392: 8-channel, 14-bit voltage output DAC
Guaranteed monotonic
INL
±1 LSB max (AD5391)
±3 LSB max (AD5390-5/AD5392-5)
±4 LSB max (AD5390-3/AD5392-3)
On-chip 1.25 V/2.5 V, 10 ppm/°C reference
Temperature range: −40°C to +85°C
Rail-to-rail output amplifier
Power-down mode
Package types
64-lead LFCSP (9 mm × 9 mm)
52-lead LQFP (10 mm × 10 mm)
User interfaces
Serial SPI-, QSPI-, MICROWIRE-, and DSP-compatible
(featuring data readback)
I²C-compatible interface
Integrated functions
channel monitor
simultaneous output update via LDAC
clear function to user-programmable code
amplifier boost mode to optimize slew rate
user-programmable offset and gain adjust
toggle mode enables square wave generation
thermal monitor
Robust 6.5 kV HBM and 2 kV FICDM ESD rating
APPLICATIONS
Instrumentation and industrial control
Power amplifier control
Level setting (ATE)
Control systems
Microelectromechanical systems (MEMs)
Variable optical attenuators (VOAs)
Optical transceivers (MSA 300, XFP)
DV_DD (×3)
DGND (×3/×4)
FUNCTIONAL BLOCK DIAGRAM
AV_DD (×2)
AGND (×2) DAC_GND (×2) REF_GND REFOUT/REFIN SIGNAL_GND (×2)
AD5390
1.25V/2.5V
REFERENCE
SPI/I²C
DCEN/AD1
DIN/SDA
SCLK/SCL
SYNC/AD0
SDO
BUSY
PD
CLR
RESET
MON_IN1
MON_IN2
INTERFACE
CONTROL
LOGIC
STATE
MACHINE
AND
CONTROL
LOGIC
POWER-ON
RESET
V_IN0 V_IN15
MUX
14
INPUT ₁₄
REG
0
14
m REG0
14
c REG0
14
INPUT ₁₄
REG
1
14
m REG1
14
c REG1
14 DAC 14
REG
0
DAC 0
14 DAC 14
REG
1
DAC 1
14
INPUT ₁₄
REG
6
14
m REG6
14
c REG6
14
INPUT ₁₄
REG
7
14
m REG7
14
c REG7
14 DAC 14
REG
6
DAC 6
14 DAC 14
REG
7
DAC 7
×2
R
R
R
R
R
R
R
R
VOUT 0
VOUT 1
VOUT 2
VOUT 3
VOUT 4
VOUT 5
VOUT 6
VOUT 7
VOUT 8
VOUT 15
MON_OUT
Figure 1.
LDAC
Rev. F
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