AD5381 Datasheet, PDF (1/36 Pages) Analog Devices – 40-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC

40-Channel, 3 V/5 V, Single-Supply,
12-Bit, Voltage Output DAC
AD5381
FEATURES
INTEGRATED FUNCTIONS
Guaranteed monotonic
Channel monitor
INL error: ±1 LSB max
Simultaneous output update via LDAC
On-chip 1.25 V/2.5 V, 10 ppm/°C reference
Clear function to user programmable code
Temperature range: –40°C to +85°C
Amplifier boost mode to optimize slew rate
Rail-to-rail output amplifier
User programmable offset and gain adjust
Power-down
Toggle mode enables square wave generation
Package type: 100-lead LQFP (14 mm × 14 mm)
Thermal monitors
User Interfaces:
Parallel
Serial (SPI®/QSPI™/MICROWIRE™/DSP compatible,
featuring data readback)
I²C® compatible
APPLICATIONS
Variable optical attenuators (VOA)
Level setting (ATE)
Optical micro-electro-mechanical systems (MEMs)
Control systems
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
DVDD (×3)
DGND (×3)
AVDD (×5)
AGND (×5) DAC GND (×5)
REFGND REFOUT/REFIN SIGNAL GND (×5)
PD
SER/PAR
FIFO EN
CS/(SYNC/AD 0)
WR/(DCEN/AD 1)
SDO
AD5381
DB11/(DIN/SDA)
DB10/(SCLK/SCL)
DB9/(SPI/I2C)
DB8
DB0
A5
A0
INTERFACE
CONTROL
LOGIC
FIFO
+
STATE
MACHINE
+
CONTROL
LOGIC
REG 0
REG 1
RESET
BUSY
CLR
POWER-ON
RESET
V_OUT 0………V_OUT 38
39-TO-1
MUX
12 _INPUT 12
REG 0
12
m REG 0
12
c REG 0
12 _INPUT 12
REG 1
12
m REG 1
12
c REG 1
12 _INPUT 12
REG 6
12
m REG 6
12
c REG 6
12 _INPUT 12
REG 7
12
m REG 7
12
c REG 7
×5
1.25V/2.5V
REFERENCE
12
DAC ¹²
REG 0
DAC 0
12
DAC ¹²
REG 1
DAC 1
12
DAC ¹²
REG 6
DAC 6
12
DAC ¹²
REG 7
DAC 7
R
R
R
R
R
R
R
R
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT38
VOUT 39/MON_OUT
Figure 1.
LDAC
Rev. A
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