AD5379_15 Datasheet, PDF (1/29 Pages) Analog Devices – 40-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage-Output DAC

40-Channel, 14-Bit, Parallel and
Serial Input, Bipolar Voltage-Output DAC
AD5379
FEATURES
40-channel DAC in 13 mm × 13 mm 108-lead CSPBGA
Guaranteed monotonic to 14 bits
Buffered voltage outputs
Output voltage span of 3.5 V × VREF(+)
Maximum output voltage span of 17.5 V
System calibration function allowing user-programmable
offset and gain
Pseudo differential outputs relative to REFGND
Clear function to user-defined REFGND (CLR pin)
Simultaneous update of DAC outputs (LDAC pin)
DAC increment/decrement mode
Channel grouping and addressing features
Interface options:
Parallel interface
DSP/microcontroller-compatible, 3-wire serial interface
2.5 V to 5.5 V JEDEC-compliant digital levels
SDO daisy-chaining option
Power-on reset
Digital reset (RESET pin and soft reset function)
APPLICATIONS
Level setting in automatic test equipment (ATE)
Variable optical attenuators (VOA)
Optical switches
Industrial control systems
RESET
FIFOEN
DCEN/WR
SYNC/CS
REG0
REG1
DB13
SCLK/DB12
DIN/DB11
DB0
A7
A0
SER/PAR
DIN
SCLK
SDO
REFGND B1
REFGND B2
REFGND C1
REFGND C2
REFGND D1
REFGND D2
FUNCTIONAL BLOCK DIAGRAM
V_CC
V_DD V_SS AGND
DGND
LDAC
V_BIAS V_REF1(+) V_REF1(–) REFGND A1
POWER-ON
RESET
AD5379
VBIAS
/ / ¹⁴
INPUT
REG
14
0–1
m REG0–1
14_/
c REG0–1
/ / 14 INPUT 14
REG
2
m REG2
14_/
14_/
c REG2
14_/
/ ^DAC
REG
14
DAC 0–1
0–1
/ / ¹⁴
DAC ₁₄
REG
DAC 2
2
/ / ¹⁴
INPUT
REG
14
7
m REG7
14_/
c REG7
14_/
/ ^DAC
REG
14
DAC 7
7
BUSY
/ / ¹⁴
INPUT
REG
14
8–9
m REG8–9
14_/
c REG8–9
14_/
/ ^DAC
REG
14
DAC 8–9
8–9
×4
Figure 1.
V_REF2(+) V_REF2(–) REFGND A2
CLR
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
VOUT8
VOUT9
VOUT10
VOUT39
AD5379—Protected by U.S. Patent No. 5,969,657.
Rev. B
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