AD5372 Datasheet, PDF (1/25 Pages) Analog Devices – 32-Channel, 16/14, Serial Input, Voltage-Output DACs

Preliminary Technical Data
32-Channel, 16/14, Serial Input,
Voltage-Output DACs
AD5372/AD5373
FEATURES
32-channel DAC in 56-LFCSP and 64-LQFP
AD5372 Guaranteed monotonic to 16 bits
AD5373 Guaranteed monotonic to 14 bits
Maximum output voltage span of 4 × VREF (20 V)
Nominal output voltage range of -4 V to +8 V
Multiple, independent output spans available
System calibration function allowing user-programmable
offset and gain
Channel grouping and addressing features
Thermal Monitoring Function
DSP/microcontroller-compatible serial interface
2.5 V to 5.5 V JEDEC-compliant digital levels
Power-on reset
Digital reset (RESET)
Clear function to user-defined SIGGND (CLR pin)
Simultaneous update of DAC outputs (LDAC pin)
APPLICATIONS
Level setting in automatic test equipment (ATE)
Variable optical attenuators (VOA)
Optical switches
Industrial control systems
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
DV_CC V_DD V_SS AGND DNGD
LDAC
SYNC
SDI
SCLK
SDO
BUSY
RESET
CLR
n
CONTROL
REGISTER
SERIAL
INTERFACE
STATE
MACHINE
n
POWER-ON
RESET
AD5372/
AD5373
n = 16 FOR AD5372
n = 14 FOR AD5373
8 A/B SELECT 8
REGISTER
TO
MUX 2's
n
n
X1 REGISTER
n _A/B
MUX
n
n
M REGISTER
n _{C REGISTER}
n
······
······
······ ······
n
n
X1 REGISTER
n
n
M REGISTER
n _{C REGISTER}
n _A/B
MUX
n
8 A/B SELECT 8
TO
REGISTER
MUX 2's
n
n
X1 REGISTER
n _A/B
MUX
n
n
M REGISTER
n _{C REGISTER}
n
······
······
······ ······
n
n
X1 REGISTER
n
n
M REGISTER
n
C REGISTER
n _A/B
MUX
n
14
OFS0 ⁿ
REGISTER
OFFSET
DAC 0
X2A REGISTER
X2B REGISTER
·
·
·
·
·
·
X2A REGISTER
X2B REGISTER
MUX ⁿ
2
·
·
·
·
·
·
MUX ⁿ
2
DAC 0 ⁿ
REGISTER
·
·
·
·
·
·
DAC 7 ⁿ
REGISTER
DAC 0
···
···
DAC 7
BUFFER
GROUP 0
BUFFER
OUTPUT BUFFER
AND POWER
DOWN CONTROL
·
··
··
·
OUTPUT BUFFER
AND POWER
DOWN CONTROL
14
OFS1 ⁿ
REGISTER
OFFSET
DAC 1
X2A REGISTER
X2B REGISTER
·
·
·
·
·
·
X2A REGISTER
X2B REGISTER
MUX ⁿ
2
·
·
·
·
·
·
MUX ⁿ
2
DAC 0 ⁿ
REGISTER
·
·
·
·
·
·
DAC 7 ⁿ
REGISTER
DAC 0
·
···
··
DAC 7
BUFFER
GROUP 1
OUTPUT BUFFER
AND POWER
DOWN CONTROL
·
··
··
·
OUTPUT BUFFER
AND POWER
DOWN CONTROL
VREF1 SUPPLIES
GROUP 2 TO GROUP 3 GROUP 1 TO 3
ARE IDENTICAL TO GROUP 1
5 372-000 1B
Figure 1.
AD5372/AD5373—Protected by U.S. Patent No. 5,969,657; other patents pending
SIGGND2
SIGGND3
VREF0
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
SIGGND0
VREF1
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
SIGGND1
VOUT16
TO
VOUT31
Rev. PrF
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