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AD5361_15 Datasheet, PDF (1/29 Pages) Analog Devices – 16-Channel, 16-/14-Bit, Serial Input, Voltage-Output DAC
16-Channel, 16-/14-Bit,
Serial Input, Voltage-Output DAC
AD5360/AD5361
FEATURES
16-channel DAC in 52-lead LQFP and 56-lead LFCSP
packages
Guaranteed monotonic to 16/14 bits
Nominal output voltage range of −10 V to +10 V
Multiple output spans available
Temperature monitoring function
Channel monitoring multiplexer
GPIO function
System calibration function allowing user-programmable
offset and gain
Channel grouping and addressing features
Data error checking feature
SPI-compatible serial interface
2.5 V to 5.5 V digital interface
Digital reset (RESET)
Clear function to user-defined SIGGNDx
Simultaneous update of DAC outputs
APPLICATIONS
Instrumentation
Industrial control systems
Level setting in automatic test equipment (ATE)
Variable optical attenuators (VOA)
Optical line cards
TEMP_OUT
PEC
MON_IN0
MON_IN1
MON_OUT
GPIO
BIN/2SCOMP
SYNC
SDI
SCLK
SDO
BUSY
RESET
CLR
FUNCTIONAL BLOCK DIAGRAM
DVCC VDD VSS AGND DGND
LDAC
TEMP
SENSOR
8
CONTROL
REGISTER
VOUT0 TO
VOUT15
6
MUX
2
GPIO
REGISTER
SERIAL
INTERFACE
n = 16 FOR AD5360
n = 14 FOR AD5361
8 A/B SELECT 8
REGISTER
n
n
X1 REGISTER
n
n
M REGISTER
n
C REGISTER
n
······
······
n
n
X1 REGISTER
n
n
M REGISTER
n
C REGISTER
n
TO
MUX 2s
n A/B
MUX
······ ······
n A/B
MUX
STATE
MACHINE
n
AD5360/
AD5361
8
A/B SELECT 8
REGISTER
TO
MUX 2s
n
n
X1 REGISTER
n A/B
MUX
n
n
n
M REGISTER
C REGISTER
······
n
······
······ ······
n
n
X1 REGISTER
n A/B
MUX
n
n
M REGISTER
n
C REGISTER
n
14
OFS0 14 OFFSET
REGISTER
DAC 0
X2A REGISTER
n
MUX
X2B REGISTER 2
·
·
·
·
·
X2A REGISTER
X2B REGISTER
·
·
·
·
·
MUX n
2
DAC 0 n
REGISTER
·
·
·
·
·
·
DAC 7 n
REGISTER
DAC 0
·····
·
DAC 7
14
OFS1 n
REGISTER
OFFSET
DAC 1
X2A REGISTER
X2B REGISTER
·
·
·
·
·
·
X2A REGISTER
X2B REGISTER
MUX n
2
·
·
·
·
·
·
MUX n
2
DAC 0 n
REGISTER
·
·
·
·
·
DAC 7 n
REGISTER
DAC 0
·
···
··
DAC 7
BUFFER
GROUP 0
BUFFER
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
····
··
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
BUFFER
GROUP 1
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
··
·
···
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
VREF0
VOUT0
VOUT1
VOUT2
VOUT3
VOUT4
VOUT5
VOUT6
VOUT7
SIGGND0
VREF1
VOUT8
VOUT9
VOUT10
VOUT11
VOUT12
VOUT13
VOUT14
VOUT15
SIGGND1
Figure 1.
Rev. A
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