AD5338R Datasheet, PDF (1/28 Pages) Analog Devices – Dual, 10-Bit nanoDAC with 2 ppm/C Reference, I2C Interface

Data Sheet
Dual, 10-Bit nanoDAC
with 2 ppm/°C Reference, I²C Interface
AD5338R
FEATURES
Low drift 2.5 V reference: 2 ppm/°C typical
Tiny package: 3 mm × 3 mm, 16-lead LFCSP
Total unadjusted error (TUE): ±0.1% of full-scale range (FSR)
maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum
High drive capability: 20 mA, 0.5 V from supply rails
User selectable gain of 1 or 2 (GAIN pin)
Reset to zero scale or midscale (RSTSEL pin)
1.8 V logic compatibility
Low glitch: 0.5 nV-sec
400 kHz I²C-compatible serial interface
Robust 3.5 kV HBM and 1.5 kV FICDM ESD rating
Low power: 3.3 mW at 3 V
2.7 V to 5.5 V power supply
−40°C to +105°C temperature range
APPLICATIONS
Optical transceivers
Base station power amplifiers
Process controls (programmable logic controller [PLC] I/O cards)
Industrial automation
Data acquisition systems
GENERAL DESCRIPTION
The AD5338R, a member of the nanoDAC® family, is a low power,
dual, 10-bit buffered voltage output digital-to-analog converter
(DAC). The device includes a 2.5 V, 2 ppm/°C internal reference
(enabled by default) and a gain select pin giving a full-scale output
of 2.5 V (gain = 1) or 5 V (gain = 2). The AD5338R operates from
a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design,
and exhibits less than 0.1% FSR gain error and 1.5 mV offset error
performance. The device is available in a 3 mm × 3 mm LFCSP
and a TSSOP package.
The AD5338R also incorporates a power-on reset circuit and a
RSTSEL pin that ensures that the DAC outputs power up to zero
scale or midscale and remain there until a valid write takes place.
It contains a per channel power-down feature that reduces the
current consumption of the device to 4 µA at 3 V while in power-
down mode.
The AD5338R uses a versatile 2-wire serial interface that operates
at clock rates up to 400 kHz and includes a VLOGIC pin intended
for 1.8 V/3 V/5 V logic.
V_LOGIC
SCL
SDA
A1
A0
FUNCTIONAL BLOCK DIAGRAM
V_DD
GND
V_REF
AD5338R
2.5V
REFERENCE
INPUT
REGISTER
DAC
STRING
REGISTER DAC A
INPUT
REGISTER
DAC
STRING
REGISTER DAC B
BUFFER
BUFFER
V_OUTA
V_OUTB
POWER-ON
RESET
GAIN =
×1/×2
POWER-
DOWN
LOGIC
LDAC RESET
RSTSEL
Figure 1.
GAIN
Table 1. Related Devices
Interface
Reference
SPI
Internal
External
I²C
Internal
External
12-Bit
AD5687R
AD5687
AD5697R
10-Bit
AD5313R¹
AD5313¹
AD5338R¹
AD5338¹
1 _{The AD5338R and the AD5338 are not pin-to-pin or software compatible. The}
AD5313R and the AD5313 are not pin-to-pin or software compatible.
PRODUCT HIGHLIGHTS
1. Precision DC Performance.
TUE: ±0.1% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum
2. Low Drift 2.5 V On-Chip Reference.
2 ppm/°C typical temperature coefficient
5 ppm/°C maximum temperature coefficient
3. Two Package Options.
3 mm × 3 mm, 16-lead LFCSP
16-lead TSSOP
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com