AD5203 Datasheet, PDF (1/12 Pages) Analog Devices – 4-Channel, 64-Position Digital Potentiometer

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4-Channel, 64-Position
Digital Potentiometer
AD5203
FEATURES
64 Position
Replaces Four Potentiometers
10 k⍀, 100 k⍀
Power Shutdown—Less than 5 ␮A
3-Wire SPI-Compatible Serial Data Input
10 MHz Update Data Loading Rate
+2.7 V to +5.5 V Single Supply Operation
Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Programmable Filters, Delays, Time Constants
Volume Control, Panning
Line Impedance Matching
Power Supply Adjustment
GENERAL DESCRIPTION
The AD5203 provides a quad channel, 64-position digitally-
controlled variable resistor (VR) device. These parts perform the
same electronic adjustment function as a potentiometer or vari-
able resistor. The AD5203 contains four independent variable
resistors in a 24-lead SOIC and the compact TSSOP-24 pack-
ages. Each part contains a fixed resistor with a wiper contact
that taps the fixed resistor value at a point determined by a digi-
tal code loaded into the controlling serial input register. The
resistance between the wiper and either endpoint of the fixed
resistor varies linearly with respect to the digital code transferred
into the VR latch. Each variable resistor offers a completely
programmable value of resistance, between the A terminal and
the wiper or the B terminal and the wiper. The fixed A-to-B
terminal resistance of 10 kΩ, or 100 kΩ has a ± 1% channel-to-
channel matching tolerance with a nominal temperature coeffi-
cient of 700 ppm/°C.
Each VR has its own VR latch which holds its programmed
resistance value. These VR latches are updated from an internal
serial-to-parallel shift register that is loaded from a standard
3-wire serial-input digital interface. Eight data bits make up the
data word clocked into the serial input register. The data word is
decoded where the first two bits determine the address of the VR
latch to be loaded, the last 6-bits are data. A serial data output
pin at the opposite end of the serial register allows simple daisy-
chaining in multiple VR applications without additional external
decoding logic.
FUNCTIONAL BLOCK DIAGRAM
V_DD
DGND
SDI
CLK
CS
AD5203
1
DAC ²
SELECT
3
4
A1, A0
2
8-BIT
SERIAL ₆
LATCH
D
CK Q RS
6-BIT
LATCH
6
CK RS
DAC 1
SHDN
A1
W1
B1
AGND1
6-BIT
LATCH
6
CK RS
DAC 2
SHDN
A2
W2
B2
AGND2
6-BIT
LATCH
6
CK RS
DAC 3
SHDN
A3
W3
B3
AGND3
6-BIT
LATCH
6
CK RS
DAC 4
SHDN
A4
W4
B4
AGND4
SDO
RS
SHDN
The reset RS pin forces the wiper to the midscale position by
loading 20_H into the VR latch. The SHDN pin forces the resis-
tor to an end-to-end open circuit condition on terminal A and
shorts the wiper to terminal B, achieving a microwatt power
shutdown state. When shutdown is returned to logic-high the
previous latch settings put the wiper in the same resistance set-
ting prior to shutdown.
The AD5203 is available in a narrow body P-DIP-24, the
24-lead surface mount package, and the compact 1.1 mm thin
TSSOP-24 package. All parts are guaranteed to operate over the
extended industrial temperature range of –40°C to +85°C.
For pin compatible higher resolution applications, see the 256-
position AD8403 product.
REV. 0
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© Analog Devices, Inc., 1998