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AD2S90_15 Datasheet, PDF (1/12 Pages) Analog Devices – Low Cost, Complete 12-Bit Resolver-to-Digital Converter
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FEATURES
Complete Monolithic Resolver-to-Digital Converter
Incremental Encoder Emulation (1024-Line)
Absolute Serial Data (12-Bit)
Differential Inputs
12-Bit Resolution
Industrial Temperature Range
20-Lead PLCC
Low Power (50 mW)
APPLICATIONS
Industrial Motor Control
Servo Motor Control
Industrial Gauging
Encoder Emulation
Automotive Motion Sensing and Control
Factory Automation
Limit Switching
Low Cost, Complete 12-Bit
Resolver-to-Digital Converter
SIN
SIN LO
COS
COS LO
NMC
A
B
NM
CS
SCLK
DATA
AD2S90
FUNCTIONAL BLOCK DIAGRAM
REF
HIGH ACCURACY
ANGLE
SIN COS
␪
MULTIPLIER
DECODE
LOGIC
DIGITAL
ANGLE ␾
UP-DOWN
COUNTER
SIN (␪ – ␾)
P.S.D. AND VEL
FREQUENCY
SHAPING
ERROR
AMPLIFIER
U/D
CLK
CLKOUT
HIGH
DYNAMIC
RANGE V.C.O. DIR
LATCH
SERIAL INTERFACE
GENERAL DESCRIPTION
The AD2S90 is a complete 12-bit resolution tracking resolver-
to-digital converter. No external components are required to
operate the device.
The converter accepts 2 V rms ± 10% input signals in the range
3 kHz–20 kHz on the SIN, COS and REF inputs. A Type II
servo loop is employed to track the inputs and convert the input
SIN and COS information into a digital representation of the
input angle. The bandwidth of the converter is set internally at
1 kHz within the tolerances of the device. The guaranteed maxi-
mum tracking rate is 500 rps.
Angular position output information is available in two forms,
absolute serial binary and incremental A quad B.
The absolute serial binary output is 12-bit (1 in 4096). The data
output pin is high impedance when Chip Select CS is logic HI.
This allows the connection of multiple converters onto a com-
mon bus. Absolute angular information in serial pure binary
form is accessed by CS followed by the application of an exter-
nal clock (SCLK) with a maximum rate of 2 MHz.
The encoder emulation outputs A, B and NM continuously
produce signals equivalent to a 1024 line encoder. When de-
coded this corresponds to 12 bits of resolution. Three common
north marker pulsewidths are selected via a single pin (NMC).
An analog velocity output signal provides a representation of
velocity from a rotating resolver shaft traveling in either a clock-
wise or counterclockwise direction.
The AD2S90 operates on ± 5 V dc ± 5% power supplies and is
fabricated on Analog Devices’ Linear Compatible CMOS pro-
cess (LC2MOS). LC2MOS is a mixed technology process that
combines precision bipolar circuits with low power CMOS logic
circuits.
PRODUCT HIGHLIGHTS
Complete Resolver-Digital Interface. The AD2S90 provides
the complete solution for digitizing resolver signals (12-bit reso-
lution) without the need for external components.
Dual Format Position Data. Incremental encoder emulation
in standard A QUAD B format with selectable North Marker
width. Absolute serial 12-bit angular binary position data
accessed via simple 3-wire interface.
Single High Accuracy Grade in Low Cost Package. ±10.6 arc
minutes of angular accuracy available in a 20-lead PLCC.
Low Power. Typically 50 mW power consumption.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 1999