AD1376_15 Datasheet, PDF (1/12 Pages) Analog Devices – Complete, High Speed 16-Bit A/D Converters

Complete, High Speed
16-Bit A/D Converters
AD1376/AD1377
FEATURES
Complete 16-bit converters with reference and clock
±0.003% maximum nonlinearity
Digital output data is provided in parallel form with
corresponding clock and status outputs. All digital inputs and
outputs are TTL-compatible.
No missing codes to 14 bits over temperature
Fast conversion
17 µs to 16 bits (AD1376)
10 µs to 16 bits (AD1377)
Short cycle capability
Adjustable clock rate
Parallel outputs
For the AD1376, the serial output function is no longer
available after date code 0111. For the AD1377, the serial output
function is no longer available after date code 0210. The option
of applying an external clock on the CONVERT START pin to
slow down the internally set conversion time is no longer
supported for either part.
Low power
645 mW typical (AD1376)
585 mW typical (AD1377)
Industry-standard pinout
PRODUCT HIGHLIGHTS
1. The AD1376/AD1377 provide 16-bit resolution with a
maximum linearity error of ±0.003% (1/2 LSB14) at 25°C.
GENERAL DESCRIPTION
The AD1376/AD1377 are high resolution, 16-bit analog-to-
digital converters with internal reference, clock, and laser-
trimmed thin-film applications resistors. The AD1376/AD1377
are excellent for use in high resolution applications requiring
moderate speed and high accuracy or stability over commercial
temperature ranges (0°C to 70°C). They are packaged in
compact 32-lead, ceramic seam-sealed (hermetic), dual in-line
packages (DIP). Thin-film scaling resistors provide bipolar
input ranges of ±2.5 V, ±5 V, and ±10 V and unipolar input
ranges of 0 V to +5 V, 0 V to +10 V, and 0 V to +20 V.
2. The AD1376 conversion time is 14 µs (typical) short cycled
to 14 bits, and 16 µs to 16 bits.
3. The AD1377 conversion time is 8 µs (typical) short cycled
to 14 bits, and 9 µs to 16 bits.
4. Two binary codes are available on the digital output. They
are CSB (complementary straight binary) for unipolar input
voltage ranges and COB (complementary offset binary) for
bipolar input ranges. Complementary twos complement
(CTC) coding may be obtained by inverting Pin 1 (MSB).
5. The AD1376/AD1377 include internal reference and clock
with external clock rate adjust pin, and parallel digital outputs.
FUNCTIONAL BLOCK DIAGRAM
(MSB) BIT 1 1
BIT 2 2
BIT 3 3
BIT 4 4
BIT 5 5
BIT 6 6
BIT 7 7
BIT 8 8
BIT 9 9
BIT 10 10
BIT 11 11
BIT 12 12
(LSB FOR 13 BITS) BIT 13 13
(LSB FOR 14 BITS) BIT 14 14
BIT 15 15
BIT 16 16
AD1376/AD1377
16-BIT SAR
COMPARATOR
32 SHORT CYCLE
31 CONVERT START
REFERENCE
30 +5V DC SUPPLY V_L
29 GAIN ADJUST
7.5kΩ
28 +15V DC SUPPLY V_CC
27 COMPARATOR IN
26 BIPOLAR OFFSET
25 +10V
3.75kΩ 3.75kΩ
24 +20V
23 CLK RATE CTRL
22 ANALOG COMMON
21 –15V DC SUPPLY V_EE
20 CLOCK OUT
CLOCK
19 DIGITAL COMMON
18 STATUS
17 NC
Figure 1.
Rev. D
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