AD10465_15 Datasheet, PDF (1/24 Pages) Analog Devices – Dual Channel, 14-Bit, 65 MSPS A/D Converter

Dual Channel, 14-Bit, 65 MSPS A/D Converter
with Analog Input Signal Conditioning
AD10465
FEATURES
Dual, 65 MSPS minimum sample rate
Channel-to-channel matching, ±0.5% gain error
Channel-to-channel isolation, >90 dB
DC-coupled signal conditioning included
Selectable bipolar input voltage range
(±0.5 V, ±1.0 V, ±2.0 V)
Gain flatness up to 25 MHz: <0.2 dB
80 dB spurious-free dynamic range
Twos complement output format
3.3 V or 5 V CMOS-compatible output levels
1.75 W per channel
Industrial and military grade
The AD10465 uses innovative high density circuit design and laser
trimmed, thin film resistor networks to achieve exceptional
matching and performance, while still maintaining excellent
isolation and providing for significant board area savings.
The AD10465 operates with ±5.0 V supplies for the analog
signal conditioning with a separate 5.0 V supply for the analog-
to-digital conversion and 3.3 V digital supply for the output
stage. Each channel is completely independent, allowing
operation with independent encode and analog inputs. The
AD10465 also offers the user a choice of analog input signal
ranges to further minimize additional external signal
conditioning, while remaining general-purpose.
APPLICATIONS
Phased array receivers
Communications receivers
FLIR processing
Secure communications
GPS antijamming receivers
Multichannel, multimode receivers
GENERAL DESCRIPTION
The AD10465 is packaged in a 68-lead ceramic leaded chip
carrier package, footprint-compatible with the earlier
generation AD10242 (12-bit, 40 MSPS) and AD10265 (12-bit,
65 MSPS). Manufacturing is done on the Analog Devices Mil-
38534 Qualified Manufacturers Line (QML) and components
are available up to Class-H (−40°C to +85°C). The AD6644
internal components are manufactured on Analog Devices’ high
speed complementary bipolar process (XFCB).
The AD10465 is a full channel ADC solution with on-module
PRODUCT HIGHLIGHTS
signal conditioning for improved dynamic performance and
1. Guaranteed sample rate of 65 MSPS.
fully matched channel-to-channel performance. The module
includes two wide dynamic range AD6644 ADCs. Each
AD6644 has a dc-coupled amplifier front end including an
AD8037 low distortion, high bandwidth amplifier that provides
2. Input amplitude options, user configurable.
3. Input signal conditioning included; both channels matched
for gain.
high input impedance and gain and drives the AD8138 single-
4. Fully tested/characterized performance.
to-differential amplifier. The AD6644s have on-chip track-and-
hold circuitry and utilize an innovative multipass architecture
5. Footprint-compatible family; 68-lead CLCC package.
to achieve 14-bit, 65 MSPS performance.
FUNCTIONAL BLOCK DIAGRAM
A_INA3 A_INA2 A_INA1
8
7
6
REF_A
3
A_INB3 A_INB2 A_INB1
64
63
62
DRAOUT 12
D0A (LSB) 15
D1A 16
56 REF_B
D2A 17
D3A 18
D4A 19
D5A 20
D6A 21
D7A 22
D8A 23
D9A 24
D10A 25
AD10465
TIMING
VREF
DROUT
11
14
OUTPUT BUFFERING
3
VREF
DROUT
14
OUTPUT BUFFERING
9
28
29
31 32
33
34
35 36
37 38 39
ENCODEA ENCODEA D11 D12A D13A (MSBA) D0B (LSBB) D1B D2B D3B D4B D5B
TIMING
5
40 41
42
D6B D7B D8B
55 DRBOUT
52 ENCODEB
51 ENCODEB
49 D13B (MSBB)
48 D12B
47 D11B
46 D10B
45 D9B
Figure 1.
Rev. A
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