COREAHB2APB Datasheet, PDF (1/4 Pages) Actel Corporation – CoreAHB2APB

CoreAHB2APB
Key Features
• Supplied in SysBASIC Core Bundle
• Bridges between Advanced Microcontroller Bus
Architecture (AMBA) Advanced High-Performance
Bus (AHB) and Advanced Peripheral Bus (APB)
• Up to 16 APB Slave Devices Supported
• Automatic Connection to CoreAHB and CoreAPB
in CoreConsole
Benefits
• Allows Easy Connection of APB Devices to a
CoreMP7 or Cortex-M1 Subsystem
• Auto Stitch in CoreConsole for Rapid Development
• Compatible with AMBA, CoreMP7, and Cortex-M1
Supported Device Families
• Fusion
• IGLOO™
• IGLOOe
• ProASIC^®3L
• ProASIC3
• ProASIC3E
Synthesis and Simulation
Support
• Supported in the Actel Libero^® Integrated Design
Environment (IDE)
Verification and Compliance
• Compliant with AMBA
Contents
General Description ................................................... 1
Connecting CoreAHB2APB in CoreConsole .............. 2
Resource Requirements ............................................. 2
Ordering Information ................................................ 2
List of Changes ........................................................... 3
Datasheet Categories ................................................. 3
General Description
CoreAHB2APB (AMBA Bridge) is an AHB slave that links
the AHB bus to the APB bus and acts as the Master on
the APB bus. Address decoding for the APB bus is carried
out within CoreAHB2APB, and this provides select signals
for up to 16 APB slave slots.
Read and write transfers on the AHB bus are converted
to corresponding transfers on the APB bus. High-
bandwidth peripherals, such as memory controllers, are
typically connected to the AHB, whereas the APB bus is
used for less demanding peripherals, such as watchdogs.
Unlike the AHB bus, transfers on the APB bus are not
pipelined.
January 2008
v2.1
1
© 2008 Actel Corporation