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ACE24AC04 Datasheet, PDF (9/18 Pages) –
ACE24AC04.08.16
Two-wire Serial EEPROM
AC Characteristics
Figure 8: SCL and SDA Bus Timing
Symbol
Parameter
1.8-2.5V
Min Max
5.0V
Min Max
fSCL
TLOW
THIGH
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
400
1000
1.2
0.7
0.4
0.3
TI
Noise suppression time(1)
180
120
TAA
Clock Low to Data Out Valid
0.3
0.9
0.2
0.7
Time the bus must be free before a new
TBUF
1.3
transmission can start
0.5
THD.STA
Start Hold Time
0.6
0.25
TSU.STA
Start Set-up Time
0.6
0.25
THD.DAT
Data In Hold Time
0
0
TSU.DAT
Data In Set-up Time
100
100
TR
Inputs Rise Time
0.3
0.3
TF
Inputs Fall Time
300
100
TSU.STO
Stop Setup Time
0.6
0.25
TDH
Data Out Hold Time
50
50
TWR
Endurance(1)
Write Cycle Time
25℃, Page Mode,3.3V
5
5
1,000,000
Notes*: 1. This Parameter is expected by characterization but is not fully screened by test.
2. AC Measurement conditions:
RL (Connects to Vcc): 1.3KΩ
Input Pulse Voltages: 0.3Vcc to 0.7Vcc
Input and output timing reference Voltages: 0.5Vcc
Units
kHz
µs
µs
ns
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
ms
Write Cycles
VER 1.2 9