ACE93C46A Datasheet, PDF (6/16 Pages) ACE Technology Co., LTD. – Three-wire Serial EEPROM

ACE93C46A/56A/66A
Three-wire Serial EEPROM
(C) ERASE/WRITE DISABLE
To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction dis ables
all programming modes and should be executed after all programming operations. The
operation of the READ instruction is independent of both the EWEN and EWDS instructions and
can be executed at any time.
(D) ERASE
The Erase (ERASE) instruction programs all bits in the specified memory location to the logical
“1” state. The self-timed erase cycle starts once the ERASE instruction and address are
decoded. The DO pin outputs the READY/BUSY status of the part if CS is brought high after
being kept low for a minimum of 250 ns (t_cs). A logic “1” at pin DO indicates that the selected
memory location has been erased, and the part is ready for another instruction.
(E) WRITE
The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified
memory
location. The self-timed programming cycle, t_wp, starts after the last bit of data is received at
serial
data input pin DI. The DO pin outputs the READY/BUSY status of the part if CS is brought high
after
being kept low for a minimum of 250 ns (t_tp). A logic “0” at DO indicates that programming is still
in
progress. A logic “1” indicates that the memory location at the specified address has been written
with the data pattern contained in the instruction and the part is ready for further instructi ons. A
READY/BUSY status cannot be obtained if the CS is brought high after the end of the
self-timed
programming cycle, t_wp.
(F) ERASE ALL
The Erase All (ERAL) instruction programs every bit in the memory array to the logic “1” state
and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the
part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The ERAL
instruction is valid only at VCC = 5.0V ± 10%.
(G) WRITE ALL
The Write All (WRAL) instruction programs all memory locations with the data patterns specified
in the instruction. The DO pin outputs the READY/BUSY status of the part if CS is brought high
after being kept low for a minimum of 250 ns (tCS). The WRAL instruction is valid only at VCC =
5.0V ± 10%.
VER 1.3 6