ACE24C128B Datasheet, PDF (6/17 Pages) ACE Technology Co., LTD. – Two-wire Serial EEPROM

ACE24C128B/256B/512B
Two-wire Serial EEPROM
Figure 2: Start and Stop Definition
Figure 3: Output Acknowledge
Device Addressing
The 128K/256K/512K EEPROM devices all require an 8-bit device address word following a start
condition to enable the chip for a read or write operation (see to Figure 4 on page 7).
The device address word consists of a mandatory "1", "0" sequence for the first four most significant
bits as shown. This is common to all the Serial EEPROM devices.
The 128K/256K/512K EEPROM uses A2, A1 and A0 device address bits to allow as much as eight
devices on the same bus. These 3 bits must be compared to their corresonding hardwired input pins.
The A2, A1 and A0 pins use an internal proprietary circuit that biases them to a logic low condition if the
pins are allowed to float.
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