ACE24AC04.08.16 Datasheet, PDF (5/18 Pages) ACE Technology Co., LTD. – Two-wire Serial EEPROM

ACE24AC04.08.16
Two-wire Serial EEPROM
Figure 2: Timing diagram for output acknowledge
Device Addressing
The 2-wire serial bus protocol mandates an 8 bits device address word after a start bit condition to
invoke valid read or write command. The first four most significant bits of the device address must be
1010, which is common to all serial EEPROM devices. The next three bits are device address bits.
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These three device address bits (5 , 6 and 7 ) are to match with the external chip select/address
pin states. If a match is made, the EEPROM device outputs an acknowledge signal after the 8th
read/write bit, otherwise the chip will go into standby mode. However, matching may not be needed
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for some or all device address bits (5 , 6 and 7 ) as noted below. The last or 8th bit is a read/write
command bit. If the 8th bit is at VIH then the chip goes into read mode. If a “0” is detected, the device
enters programming mode.
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ACE24AC04 uses A2 (5 ) and A1 (6 ) device address bits. Only four ACE24AC04 devices can be
wired-OR on the same 2-wire bus. Their corresponding chip select address pins A2 and A1 must be
hard wired and coded from 00 (b) to 11 (b). Chip select address pin A0 is not used.
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ACE24AC08 uses only A2 (5 ) device address bit. Only two ACE24AC08 devices can be wired-OR
on the same 2-wire bus. Their corresponding chip select address pin A2 must be hard-wired and
coded from 0 (b) to 1 (b). Chip select address pins A1 and A0 are not used.
ACE24AC16 does not use any device address bit. Only one ACE24AC16 device can be used on the
on 2-wire bus. Chip Select address pins A2, A1, and A0 are not used.
Write Operations
A. Byte Write
A byte write operation starts when a micro-controller sends a start bit condition, follows by a proper
EEPROM device address and then a write command. If the device address bits match the chip
select address, the EEPROM device will acknowledge at the 9^th clock cycle. The micro-controller will
then send the rest of the lower 8 bits word address. At the 18^th cycle, the EEPROM will acknowledge
the 8-bit address word. The micro-controller will then transmit the 8 bit data. Following an
acknowledge signal from the EEPROM at the 27^th clock cycle, the micro-controller will issue a stop
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