ACE24C32BD Datasheet, PDF (4/17 Pages) ACE Technology Co., LTD. – Two-wire Serial EEPROM

ACE24C32BD
Two-wire Serial EEPROM
Pin Descriptions
Device/Page Addresses (A2, A1 and A0):
The A2, A1 and A0 pins are device address inputs that are hard wired for the ACE24C32BD Eight 32K
devices may be addressed on a single bus system (device addressing is discussed in detail under the
Device Addressing section).
Serial Data (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-Read with any number of other open-drain or open- collector devices.
Serial Clock (SCL):
The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock
data out of each device.
Write Protect (WP):
The ACE24C32BD has a Write Protect pin that provides hardware data protection. The Write Protect
pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is
connected to V_CC, the write protection feature is enabled and operates as shown in the following Table 2.
WP Pin Status
At V_CC
At GND
Part of the Array Protected
ACE24C32BD
Full (32K) Array
Normal Read / Write Operations
Table 2 Write Protect
Memory Organization
ACE24C32BD, 32K Serial EEPROM:
Internally organized with 128 pages of 32 bytes each, the 32K requires an12-bit data word address for
random word address.
Device Operation
Clock and Data Transitions:
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only
during SCL low time periods (see to Figure 1). Data changes during SCL high periods will indicate a
start or stop condition as defined below.
Start Condition:
A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (see to Figure 2).
Stop Condition:
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command
will place the EEPROM in a standby power mode (see to Figure 2).
Acknowledge:
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. The happens during the ninth
clock cycle.
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