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ACE24C512 Datasheet, PDF (3/15 Pages) ACE Technology Co., LTD. – Two-wire Serial EEPROM
Ordering information
ACE24C512 XX + X H
Halogen-free
U : Tube
T : Tape and Reel
Pb - free
DP : DIP-8
FM : SOP-8
TM : TSSOP-8
ACE24C512
Two-wire Serial EEPROM
Serial Clock (SCL):
The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock
data out of each device.
Serial Data (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses (A2, A1, A0):
The A2, A1 and A0 pins are device address inputs that are hardwired or left not connected for
hardware compatibility with other ACE24CXXX devices. When the pins are hardwired, as many as
eight 512K devices may be addressed on a single bus system (device addressing is discussed in detail
under the Device Addressing section).If the pins are left floating, the A2, A1 and A0 pins w ill be
internally pulled down to GND if the capacitive coupling to the circuit board Vcc plane is < 3pF, if
coupling is > 3pF recommends connecting the address pins to GND.
Write Protect (WP):
The ACE24C512 has a Write Provides hardware data protection. The WP pin allows normal write operations
when connected to ground (GND). When the Write Protect pin is connected to Vcc. All write operations
to the memory are inhibited.
Write Protect Description
WP Pin Status
WP=VCC
WP=GND
Part of the Array Protected
Full (512K) Memory
Normal Read/Write Operations
Memory Organization
ACE24C512, 512K Serial EEPROM:
Internally organized with 512 pages of 128 bytes each, the 512K requires a 16-bit data word address for
random word addressing.
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