AK681024G_09 Datasheet, PDF (1/2 Pages) ACCUTEK MICROCIRCUIT CORPORATION – Static Random Access Memory

ACCUTEK
MICROCIRCUIT CORPORATION
AK681024G
1,048,579 x 8 Bit CMOS
Static Random Access Memory
DESCRIPTION
The Accutek AK681024G is a high density SRAM memory module
organized in 1 Meg X 8 bit words. The assembly consists of four me-
dium speed 128K X 8 SRAMs in thin TSOP packages, plus a CMOS
decoder logic IC and four decoupling capacitor chips, mounted on
the front side and four medium speed 128K x 8 SRAMS in thin
TSOP packages and four decoupling capacitor chips mounted on
the back side of a low-profile printed circuit board. The module con-
figuration is a 36 pin leaded SIP.
The memory operates as a single asynchronous 1 Meg X 8 SRAM
from a 5V supply, and has common I/O, chip enable, output enable
and write enable functions. With the proper choice of SRAMs, it is
available in three separate low-standby-power configurations, with
access times of 55, 70, 85 or 100 nSEC.
The combination of low power, low profile and high density packag-
ing offered by the AK681024G makes it ideal for use in applications
where board space and available power are limited and extremely
low access times are not required. It is especially useful in VMEbus
designs and in places where very close module-to-module spacing
is dictated.
FEATURES
· 1,048,576 x 8 bit organization
· JEDEC Standard 36 pin SIP format
· Common I/O, single OE, CE and WE functions
· Low 0.550 inch maximum seated height and thin profile allow
maximum board density
1
36
· Range of access times from 55 to 100 nSEC
· Low, low-low and ultra-low standby power level versions avail-
able
· Single 5 volt power supply - AK681024G
· Single 3.3 volt power supply - AK681024G/3.3
· Operating free air temerature 0⁰C to 70⁰C (Industrial range
version of -10⁰C to 85⁰C also available)
· Completely static and asynchronous, no clock or timing strobe
required
· Low
9.0 Watt Max Active
120 µ Watt Max Standby
Low Low
9.0 Watt Max Active
80 µ Watt Standby
PIN NOMENCLATURE
PIN ASSIGNMENT
FUNCTIONAL DIAGRAM
DQ0 - DQ7
A0 - A19
CE
WE
OE
Vcc
Vss
NC
Data In/Data Out
Address Inputs
Chip Enable
Write Enable
Output Enable
5v Supply
Ground
No Connection
PIN # SYMBOL PIN # SYMBOL PIN # SYMBOL PIN # SYMBOL
1
NC 10
A4
19 CE 28
A7
2
Vcc 11 Vss 20
A15
29
A8
3
WE 12 DQ5 21
A16
30
A9
4
DQ2 13
A10
22
A12
31 DQ7
5
DQ3 14
A11
23
A18
32 DQ4
6
DQ0 15
A5
24
A6
33 DQ6
7
A1
16
A13
25 DQ1 34
A17
8
A2
17 A14 26 Vss 35 Vcc
9
A3
18
A19
27
A0
36 OE
128K x 8 SRAM
128K x 8 SRAM
128K x 8 SRAM
128K x 8 SRAM
128K x 8 SRAM
128K x 8 SRAM
128K x 8 SRAM
128K x 8 SRAM
MODULE OPTIONS
Leaded SIP: AK681024G
DECODER