AK59256AS Datasheet, PDF (1/2 Pages) ACCUTEK MICROCIRCUIT CORPORATION – 262,144 Word by 9 bit, CMOS Dynamic Random Access Memory

Accutek
Microcircuit
Corporation
DESCRIPTION
The Accutek AK59256A high density memory modules is a random
access memory organized in 256K x 9 bit words. The assembly
consists of two 256K x 4 and one 256K x 1 DRAMs in surface mount
packages mounted to the front side of a printed circuit board. The
module can be configured as a leadless 30 pad SIM or a leaded 30
pin SIP. This packaging approach provides a better than 6 to 1 den-
sity increase over standard DIP packaging.
The operation of the AK59256A is identical to two 256K x 4 DRAMs
plus one 256K x 1 DRAM. For the lower eight bits data input is tied
to data output and brought out separately for each 256K x 4 device,
with common RAS, CAS and WE control. The OE pins are tied to
Vss which dictates the use of early-write cycles to prevent conten-
tion of D and Q. Since the Write-Enable (WE) signal must always go
low before CAS in a write cycle, Read-Write and Read-Modify-Write
operation is not possible. For the ninth bit, the data input (D₉₎ and
data output (Q₉) pins are brought out separately and controlled by a
separate PCAS for that bit. Bit nine is generally used for parity.
FEATURES
· 262,144 x 9 bit organization
· Optional 30 Pad SIM (Single In-Line Module) or 30 Pin leaded
SIP (Single In-Line Package)
· JEDEC standard pinout
· Common CAS, RAS and WE control for the lower eight bits
· Separate PCAS control for D₉ and Q₉
AK59256AS / AK59256AG
262,144 Word by 9 bit, CMOS
Dynamic Random Access Memory
Front View
30-Pin SIM
+
+
1
30
30-Pin SIP
+
+
1
· Power:
1.26 Watt Max Active (70 nSEC)
1.10 Watt Max Active (80 nSEC)
.935 Wat Max Active (100 nSEC)
22 mWatt Standby (Max)
· Operating free air temperature: 0^o to 70^oC
· Upward compatible with AK491024, AK591024, AK594096
and AK5916384
· Functionally and Pin compatible with AK49256
· Available with access times of 60 nSEC to 100 nSEC
PIN NOMENCLATURE
PIN ASSIGNMENT
DQ1 - DQ8
D9
Data In / Data Out
Data In
PIN #
1
2
SYMBOL
Vcc
CAS
PIN #
16
17
Q9
A0 - A9
CAS, PCAS
Data Out
3
4
Address Inputs
5
Column Address Strobe ₆
DQ1
18
A0
19
A1
20
DQ2
21
RAS
WE
Vcc
Row Address Strobe
7
A2
22
Write Enable
5v Supply
8
A3
23
9
Vss
24
10
DQ3
25
Vss
Ground
NC
No Connect
11
A4
26
12
A5
27
13
DQ4
28
MODULE OPTIONS
14
A6
29
15
A7
30
Leadless SIM: AK59256AS
Leaded SIP: AK59256AG
SYMBOL
DQ5
A8
NC
NC
DQ6
WE
Vss
DQ7
NC
DQ8
Q9
RAS
PCAS
D9
Vcc
FUNCTIONAL DIAGRAM
A0 - A8 ₊
RAS ₊
CAS +
WE +
DQ1 +
DQ2 +
DQ3 +
DQ4 +
A0 - A8
RAS
CAS
WE
* ^DQ1
* ^DQ2
* ^DQ3
* ^DQ4
OE *
DQ5 +
DQ6 +
DQ7 +
DQ8 +
A0 - A8
RAS
CAS
WE
* ^DQ1
* ^DQ2
* ^DQ3
* ^DQ4
OE _*
PCAS +
D9 +
Q9 +
A0 - A8
RAS
CAS
WE
*D
Q