ASFLMX-200.000MHZ-5ABB Datasheet, PDF (1/4 Pages) Abracon Corporation – Ultra-Low Phase Jitter LVDS SMD Clock Oscillator

Ultra-Low Phase Jitter LVDS SMD Clock Oscillator
ASFLMX-200.000MHz-5ABB
ESD Sensitive
Moisture Sensitivity Level – MSL 3
FEATURES:
• 200MHz LVDS
• Typical phase noise: - 100fs (Integration range: 1.875MHz-20MHz)
• ±50ppm total frequency stability over -40°C to +85°C temperature range
• Industry standard 6-Pin 5 x 3.2mm LGA package
Pb RoHS/RoHS II compliant
5.0 x 3.2 x 1.4mm
APPLICATIONS:
• Communications
• Backplane reference clock
• SERDES reference clock
• FPGA
High Performance
KEY ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Item
Minimum Maximum Unit Condition
Supply Voltage
-0.3
+3.6
V
Storage Temp.
-55
Lead Temp.(soldering, 10s)
+125
°C
+260
°C
ESD (HBM)
2
kV
VDD = 2.375 - 3.63V, TA = -40°C to +85°C, outputs terminated with 100 Ohms between Q and /Q.⁽¹⁾
Parameters
Minimum
Typical
Maximum Units
Frequency
200.000
MHz
Operating Temperature (T_A)
-40
Overall Frequency Stability ⁽²⁾
-50
+85
°C
+50
ppm
Supply Voltage (V_DD)
Supply Current (I_DD)
Output Logic Level
V_OH
V_OL
Output Differential Voltage (V_OD)
Common Mode Output voltage (V_CM)
Start-up Time
+2.375
1.248
0.898
247
1.125
1.375
1.025
350
1.2
+3.63
V
90
mA
1.602
V
1.252
V
454
mV
1.375
V
20
ms
Rise Time (Tr)
Fall Time (Tf)
100
100
400
400
ps
Duty Cycle
45
55
%
Phase Noise
Integration Range:
12kHz to 20MHz
Integration Range:
1.875MHz to 20MHz
220
fsRMS
100
Notes:
1. Guaranteed after thermal equilibrium
2. Inclusive of initial accuracy, temperature drift, aging, shock, vibration from -40°C to +85°C.
Notes
V_{OH max}= V_{CM max}+1/2 V_{OD max}
V_{OL min}= V_{CM min}-1/2 V_{OD max}
RL=100Ω , CL=0pF
20% to 80%
PART IDENTIFICATION
ASFLMX-200.000MHz -5ABB -
Packing
Blank: Bulk or Tube
T: Tape & Reel (1k/reel)
ABRACON IS
ISO9001:2008
CE RCTEIFRIETDIFIED
2 Faraday, Suite# B | Irvine | CA 92618 Revised: 04.08.15
Ph. 949.546.8000 | Fax. [phone]
LLC
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