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ABX8037 Datasheet, PDF (1/10 Pages) Abracon Corporation – 38-640MHz Low Phase Noise XO
FEATURES
• Less than 0.4ps RMS (12kHz-20MHz) phase
jitter for all frequencies.
• Less than 25ps peak to peak jitter for all
frequencies.
• Low phase noise output (@ 1MHz frequency
offset
∗ -144dBc/Hz for 106.25MHz
∗ -144dBc/Hz for 156.25MHz
∗ -144dBc/Hz for 212.5MHz
∗ -140dBc/Hz for 312.5MHz,
∗ -131dBC/Hz for 622.08MHz
• 19MHz-40MHz crystal input.
• 38MHz-640MHz output.
• Available in PECL, LVDS, or CMOS outputs.
• Output Enable selector.
• 2.5V & 3.3V operation.
• Available in 3x3 QFN or 16-pin TSSOP
packages.
DESCRIPTION
The ABX803X is a monolithic low jitter and low
phase noise high performance clock, capable of
maintaining 0.4ps RMS phase jitter and CMOS,
LVDS or PECL outputs, covering a wide frequency
output range up to 640MHz. It allows high
performance and high frequency output, using a low
cost fundamental crystal of between 19-40MHz.
The frequency selector pads of ABX803X enable
output frequencies of (2, 4, 8, or 16) * FXIN. The
ABX803X is designed to address the demanding
requirements of high performance applications such
Fiber Channel, serial ATA, Ethernet, SAN, etc.
(Preliminary) ABX8037/38/39
38-640MHz Low Phase Noise XO
PACKAGE PIN ASSIGNMENT
VDDANA 1
16 SEL0^
XIN 2
XOUT 3
SEL2^ 4
OE_CTRL 5
DNC 6
GNDANA 7
15 SEL1^
14 GNDBUF
13 QBAR
12 VDDBUF
11 Q
10 GNDBUF
LP 8
9 LM
16-pin TSSOP
3x3 QFN
XOUT
SEL2^
OE_CTRL
DNC
12 11 10 9
13
8
14
7
ABX803X
15
6
16
5
1234
GNDBUF
QBAR
VDDBUF
Q
Note1: QBAR is used for single ended CMOS output.
Note2: ^ Denotes internal pull up resistor.
BLOCK DIAGRAM
XIN
XOUT
XTAL
OSC
VCO
Divider
Phase
Detector
Charge
Pump
L o+o p
Filter
VCO
(FXiNx16)
Output
Divider
(1,2,4,8)
QBAR
Q
OE
Performance Tuner
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 9/1/05 Page 1