AB-557-03 Datasheet, PDF (1/7 Pages) Abracon Corporation – CRYSTAL-LESS PCI EXPRESS DUAL OUTPUT ULTRA MINIATURE PURE SILICONTM SMD CLOCK GENERATOR

CRYSTAL-LESS PCI EXPRESS DUAL OUTPUT ULTRA MINIATURE
PURE SILICON^TM SMD CLOCK GENERATOR
AB-557-03 Series
Moisture Sensitivity Level
MSL 1 – 14 QFN
MSL 3 – 16 TSSOP
FEATURES:
• Meets PCIe Gen1, Gen2, & Gen3 specs.
• High Performance MEMS Technology by Discera
• Available Mixed Output Formats: HCSL, LVPECL, LVDS or LVCMOS
• Wide Temperature Range: -40° to 105° C
• Wide Supply Range: 2.25V to 3.6 V
• Low Power Consumption
• Excellent Shock & Vibration Immunity
Pb RoHS 3.2 x 2.5 x 0.85 mm (14 Pin QFN)
Compliant 5.1 x 4.5 x 1.1 mm (16 Pin TSSOP)
APPLICATIONS:
• Solid State Storage
• Storage Area Networks
• Passive Optical Networks
• Ethernet: 1G, 10GBASE-T/KR/LR/SR, and FCoE
• TV and other Consumer Electronics
• Industrial and Medical
• Scanner, Printer
STANDARD SPECIFICATIONS:
Parameters
Minimum Typical Maximum Unite
Notes
Frequency
f₀
2.3
100
460^*1
MHz
Operating Temperature
-20
+70
°C See options
Storage Temperature
-55
Overall Freq. Stability^*2
Δf
-50
+150
+50
°C
ppm See options
Supply Voltage
V_DD
+2.25
Supply Current- Enabled
I_DD
60
+3.6
V
mA
R_L=50Ω,
F₀₁=F₀₂=100.00MHz
Supply Current- Disabled
I_DD
21
23
mA
Startup Time
t_su
5
ms
Enable Time
t_EN
20
ns
Disable Time
t_DA
5
ns
Tri-state Function (Standby/Disable)
"1" (VIH≥0.75*Vdd) or Open: Oscillation
"0" (VIL<0.25*Vdd) : Hi Z
V
40kΩ pull-up resistor
embedded
Aging
-5.0
+5.0
ppm First year
Output Offset Voltage
V_OH
0.725
V_OL
0.10
V R_L=50 Ω
Peak to Peak Output Swing
750
mV Single-Ended
Rise Time
Fall Time
t_r
200
t_f
200
400
ps R_L=50 Ω, C_L=2pF
400
ps (20% to 80%)*VDD
Duty Cycle
SYM
48
52
% Differential
Period Jitter
J_PER
2.5
ps_RMS F₀₁=F₀₂=100.00MHz
Integrated Phase Noise
(Common Clock
Architecture)
R_J
D_J
T_J
J_RMS-CCHF
J_RMS-CCLF
0.540
0.832
8.536
0.458
0.030
ps_RMS PCIe Gen 1.1
41.9
86.0
ps_p-p
T_J= D_J + 14.069 x R_J
(BER 10-12)
3.1
3.0
ps_RMS
PCIe Gen 2.1
1.5 MHz to Nyquist
PCIe Gen 2.1
10kHz to 1.5 MHz
J_RMS-CC
0.165
1.0
ps_RMS PCIe Gen 3.0
Integrated Phase Noise
(Data Clock Architecture)
J_RMS-DCHF
J_RMS-DCLF
0.561
1.778
4.0
7.5
ps_RMS
PCIe Gen 2.1
1.5 MHz to Nyquist
PCIe Gen 2.1
10kHz to 1.5 MHz
J_RMS-DC
0.147
1.0
ps RMS PCIe Gen 3.0
*1. For frequency other than 100MHz, please contact ABRACON or consider using ASEMDxx series
2. Frequency stability includes frequency variations due to initial tolerance, temp. and power supply voltage
ABRACON IS
ISO9001:2008
CE RTIFIED
Visit www.abracon.com for Terms & Conditions of Sale Revised: 10.31.12
30332 Esperanza, Rancho Santa Margarita, California 92688
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