CNT7 Datasheet, PDF (3/7 Pages) ABCircuits – Dual Decade Counter to Seven Segment Controller

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POL
Polarity input. If this pin is open or high, the “on” segments will have a high level on the SEG
outputs of the chip. If this pin is low or grounded “on” segments will output as a low on the SEG
pins. This pin is read once at power up and has a built in pull up resistor.
UP
This input signal determines count direction, up or down. If this input is open or high, the counter
will count up. If this input is grounded or low, the counter will count down. This input is read once
at power up and has a built in pull up resistor.
CLR-
This input clears the counters when low. If the counter is in the up mode, the counter clears to
00. If the counter is in the down mode, the counter clears to 99. CLR is a software derived
function, and as such requires 1 mS of minimum input pulse width. This input has a built in pull up
resistor.
SW-
SW- and DEB form an optional switch de-bounce circuit. This input would be tied to a switch to
ground. An internal pull up resistor is provided.
DEB
This is the inverted output of the switch de-bounce circuit, which may be tied directly to the CLK
input if your design uses a mechanical switch. De-bounce time is about 37 mS, limiting input
speed to about 13 clocks per second. The output is push pull.
CLK
This is the input to the two hardware decade counters. On the positive edge of this input, the
counter increments the counters in UP mode; or decrements the counters in down mode. This
input does not have a pull up resistor. Maximum clock frequency is 12 MHz.
CB
This is the counters carry/borrow output. This signal ties to the clock of the next IC in the chain.
The output is push pull.
SEGRA, SEGRB, SEGRC, SEGRD, SEGRE, SEGRF, SEGRG
SEGLA, SEGLB, SEGLC, SEGLD, SEGLE, SEGLF, SEGLG
SEGR is the right hand of the two displays.
SEGL is the left hand of the two displays
If the POL pin is open or hi, this SEG outputs will be high when a segment is on.
If the POL pin is low or grounded, the SEG outputs will be low when a segment is on.
These are the seven segment outputs to each individual display An external driver or current
limiting resistor is required for each segment. If you are using only a resistor, it must be sized to
limit source current to 5 mA maximum per pin or sink current to 9 mA per pin.
See also the segment table, and the ASCII to seven segment translation table.
VSS
Connect to system ground.
Part Number CNT7
Copyright © 2014 ABCircuits. Revised September 2014 Page 3 of 7