AAT3131 Datasheet, PDF (9/14 Pages) Advanced Analogic Technologies – High Efficiency 1X/1.5X Fractional Charge Pump for White LED Applications

AAT3131
High Efficiency 1X/1.5X Fractional
Charge Pump for White LED Applications
Address
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Current Level Settings (mA)
D1-3
D4
0.0
0.0
0.5
0.0
1.3
0.0
3.3
0.0
8.3
0.0
11.1
0.0
15.0
0.0
20.0
0.0
0.0
1.0
0.5
1.0
1.3
1.0
3.3
1.0
8.3
1.0
11.1
1.0
15.0
1.0
20.0
1.0
0.0
15.0
0.5
15.0
1.3
15.0
3.3
15.0
8.3
15.0
11.1
15.0
15.0
15.0
20.0
15.0
0.0
30.0
0.5
30.0
1.3
30.0
3.3
30.0
8.3
30.0
11.1
30.0
15.0
30.0
20.0
30.0
Table 1: Constant Current Source Output
Programming Levels.
EN/SET Serial Interface
The current source output magnitude is controlled
by the EN/SET serial data interface. The interface
records rising edges of the EN/SET pin and decodes
them into 32 individual current level settings. The
modulo 32 interface wraps states back to State 1
after the 32nd clock, so that the previous state is
achieved by clocking the EN/SET pin 31 times. The
counter can be clocked at speeds up to 1MHz, so
that intermediate states are not visible. The first ris-
ing edge of EN/SET enables the IC and initially sets
the output LED current to 0dB. Once the final clock
cycle is input for the desired brightness level, the
EN/SET pin is held high to maintain the device out-
put current at the programmed level. The device is
disabled 500µs after the EN/SET pin transitions to a
logic low state. The EN/SET timing is designed to
accommodate a wide range of data rates. After the
first rising edge of EN/SET, the charge pump is
enabled and reaches full capacity after the soft-start
time (T_SS). During the soft-start time, multiple clock
pulses may be entered on the EN/SET pin to set the
final output current level with a single burst of clocks.
Alternatively, the EN/SET clock pulses may be
entered one at a time to gradually increase the LED
brightness over any desired time period. A constant
current is sourced as long as EN/SET remains in a
logic high state. The current source outputs are
switched off after EN/SET has remained in a low
state for at least the T_OFF timeout period.
3131.2005.12.1.2
9