AAT2556 Datasheet, PDF (19/29 Pages) Advanced Analogic Technologies – Battery Charger and Step-Down Converter for Portable Applications

AAT2556
Battery Charger and Step-Down
Converter for Portable Applications
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
C_IN =
⎛ V_PP
⎝ I_O
- ESR^⎞⎠ · F_S
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
=
1
4
for
V_IN
=
2
·
V_O
1
C_IN(MIN) = _{⎛ VPP}
⎝ I_O
- ESR^⎞⎠ · 4 · F_S
Always examine the ceramic capacitor DC voltage
coefficient characteristics when selecting the prop-
er value. For example, the capacitance of a 10µF,
6.3V, X5R ceramic capacitor with 5.0V DC applied
is actually about 6µF.
The maximum input capacitor RMS current is:
I_RMS = I_O ·
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
V_O
V_IN
· ^⎛⎝1 -
V_O ⎞
V_IN ⎠
=
D · (1 - D) =
0.5²
=
1
2
for V_IN = 2 · V_O
I = _RMS(MAX)
I_O
2
The term
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
appears in both the input
voltage ripple and input capacitor RMS current
equations and is a maximum when V_O is twice V_IN.
This is why the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the step-
down converter. Low ESR/ESL X7R and X5R
2556.2006.09.1.2
ceramic capacitors are ideal for this function. To
minimize stray inductance, the capacitor should be
placed as closely as possible to the IC. This keeps
the high frequency content of the input current
localized, minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C3)
can be seen in the evaluation board layout in
Figure 6.
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain meas-
urements can also result.
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic capacitor should
be placed in parallel with the low ESR, ESL bypass
ceramic capacitor. This dampens the high Q net-
work and stabilizes the system.
Battery Charger Output Capacitor (C2)
The AAT2556 only requires a 1µF ceramic capaci-
tor on the BAT pin to maintain circuit stability. This
value should be increased to 10µF or more if the
battery connection is made any distance from the
charger output. If the AAT2556 is to be used in
applications where the battery can be removed
from the charger, such as with desktop charging
cradles, an output capacitor greater than 10µF may
be required to prevent the device from cycling on
and off when no battery is present.
Step-Down Converter Output Capacitor (C4)
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7µF to 10µF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabi-
lize the output during large load transitions and has
the ESR and ESL characteristics necessary for low
output ripple. For enhanced transient response and
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