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AAT2505 Datasheet, PDF (13/26 Pages) Advanced Analogic Technologies – Dual Channel, Step-Down Converter/Linear Regulator
The regulator features an enable/disable function.
This pin (ENLDO) is active high and is compatible
with CMOS logic. To assure the LDO regulator will
switch on, the ENLDO turn-on control level must be
greater than 1.5V. The LDO regulator will go into the
disable shutdown mode when the voltage on the EN
pin falls below 0.6V. If the enable function is not
needed in a specific application, it may be tied to VIN
to keep the LDO regulator in a continuously on state.
When the regulator is in shutdown mode, an inter-
nal 20kΩ resistor is connected between OUT and
GND. This is intended to discharge COUT when the
LDO regulator is disabled. The internal 20kΩ resis-
tor has no adverse impact on device turn-on time.
Step-Down Converter
The AAT2505 buck is a constant frequency peak
current mode PWM converter with internal compen-
sation. It is designed to operate with an input voltage
range of 2.7V to 5.5V. The output voltage ranges
from 0.6V to the input voltage for the internally fixed
version (see Figure 1) , and up to 3.3V for the exter-
nally adjustable version (see Figure 2). The 0.6V
fixed model is also the adjustable version and is
externally programmable with a resistive divider. The
converter MOSFET power stage is sized for 600mA
load capability with up to 96% efficiency. Light load
efficiency exceeds 80% at a 500µA load.
Soft Start
The AAT2505 soft-start control prevents output
voltage overshoot and limits inrush current when
VIN
C3
10µF
VOUTLDO
C4
4.7µF
R3
100kΩ
3 VP
VCC 4
5 VLDO
EN 10
9 ENLDO
LX 2
6 OUT
FB 11
7 POK SGND 12
8 GND PGND 1
U1
AAT2505
L1
VOUTBUCK
4.7µH
C1
4.7µF
AAT2505
Dual Channel, Step-Down
Converter/Linear Regulator
either the input power or the enable input is
applied. When pulled low, the enable input forces
the converter into a low-power, non-switching state
with a bias current of less than 1µA. A startup time
of 150µs is achieved across the operating range.
Low Dropout Operation
For conditions where the input voltage drops to the
output voltage level, the converter duty cycle
increases to 100%. As 100% duty cycle is
approached, the minimum off-time initially forces
the high side on-time to exceed the 1.4MHz clock
cycle and reduce the effective switching frequency.
Once the input drops below the level where the out-
put can be regulated, the high side P-channel
MOSFET is turned on continuously for 100% duty
cycle. At 100% duty cycle, the output voltage tracks
the input voltage minus the IR drop of the high side
P-channel MOSFET RDS(ON).
Low Supply
The under-voltage lockout (UVLO) guarantees suf-
ficient VIN bias and proper operation of all internal
circuitry prior to activation.
Fault Protection
For overload conditions, the peak inductor current is
limited. Thermal protection disables switching when
the internal dissipation or ambient temperature
becomes excessive. The junction over-temperature
threshold is 140°C with 15°C of hysteresis.
VIN
C3
10µF
VOUTLDO
C4
4.7µF
R3
100kΩ
3 VP
VCC 4
5 VLDO
EN 10
9 ENLDO
LX 2
6 OUT
FB 11
7 POK
SGND 12
8 GND PGND 1
U1
AAT2505
L1
VOUTBUCK
4.7µH R1
C8
100pF
R2
59k
C1
4.7µF
Figure 1: AAT2505 Fixed Output.
2505.2006.06.1.1
Figure 2: AAT2505 with Adjustable Step-Down
Output and Enhanced Transient Response.
13