AAT1123 Datasheet, PDF (11/20 Pages) Advanced Analogic Technologies – 1MHz Step-Down Converter

The maximum input capacitor RMS current is:
I_RMS = I_O ·
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
V_{O ·} ⎛_{1 -} V_O ⎞ _{= D · (1 - D) = 0.52 =} 1
V_IN ⎝ V_IN ⎠
2
for V_IN = 2 x V_O
I = _RMS(MAX)
I_O
2
AAT1123
1MHz Step-Down Converter
The term
V_O
V_IN
·
⎛⎝_{1 -}
V_O ⎞
V_IN ⎠
appears in both the input volt-
age ripple and input capacitor RMS current equations
and is a maximum when V_O is twice V_IN. This is why
the input voltage ripple and the input capacitor RMS
current ripple are a maximum at 50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT1123. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed
as closely as possible to the IC. This keeps the
high frequency content of the input current local-
ized, minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C2) can
be seen in the evaluation board layout in Figure 2.
Figure 2: AAT1123 Evaluation Board
Top Side.
Figure 3: Exploded View of Evaluation
Board Top Side Layout.
Figure 4: AAT1123 Evaluation Board
Bottom Side.
1123.2006.05.1.5
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