AI9943 Datasheet, PDF (10/17 Pages) A1 PROs co., Ltd. – acomplete analog signal processor for CCD applications

Ai9943
Internal Register Map
(All register values default to 0x000 at power-up except clamp level, which defaults to 128 decimal,
corresponding to a clamp level of 32 LSB.)
Register
Name
Operation
Address Bits
Data Bits
A2 A1 A0
Function
Software Reset
D0
(0 = normal operation, 1 = reset all registers to default).
D2, D1
Power-Down Modes
(00 = normal power, 01 = standby, 10 = total shutdown).
D3
0
0
0 _{D5, D4}
OB Clamp Disable (0 = clamp on, 1 = clamp off).
Test Mode. Should always be set to 00.
PBLK Blanking Level
D6
(0 = blank output to zero, 1 = blank to ob clamp level).
D8, D7
Test Mode 1. Should always be set to 00.
D11 to D9 Test Mode 2. Should always be set to 000.
D0
SHP/SHD Input Polarity (0 = active low, 1 = active high).
D1
DATACLK Input Polarity (0 = active low, 1 = active high).
D2
CLPOB Input Polarity (0 = active low, 1 = active high).
D3
PBLK Input Polarity (0 = active low, 1 = active high).
Control
0
0
1 D4
Three-State Data Outputs
(0 = outputs active, 1 = outputs three-stated).
Data Output Latching
D5
(0 = latched by DATACLK, 1 = latch is transparent).
Data Output Coding
D6
(0 = binary output, 1 = gray code output).
D11 to D7 Test Mode. Should always be set to 00000
Clamp Level 0 1 0 D7 to D0 OB Clamp Level (0 = 0 LSB, 255 = 63.75 LSB)
VGA Gain
0
1
1 D9 to D0 VGA Gain (0 = 6dB, 1023 = 40dB)
10