R11-0833 Datasheet, PDF (4/16 Pages) A-Data Technology – ADDR1600C4G11 DDR3L-1600(CL11) 240-Pin R-DIMM 4GB(512M x 72-bits)

ADDR1600C4G11
DDR3L-1600(CL11) 240-Pin R-DIMM
4GB(512M x 72-bits)
General Description：
The ADATA’s module is a 512Mx72 bits 4GB(4096MB) DDR3-1600(CL11)-11-11-28
SDRAM memory module. The SPD is programmed to JEDEC standard latency 1600Mbps
timing of 11-11-11-28 at 1.35V. The module is composed of eight-teen 256Mx8 bits CMOS
DDR3 SDRAMs in FBGA package and one 2Kbit EEPROM in 8pin TDFN package on a 240pin
glass–epoxy printed circuit board.
The module is a Dual In-line Memory Module and intended for mounting onto 240-pins
edge connector sockets. Synchronous design allows precise cycle control with the use of
system clock. Data I/O transactions are possible on both edges of DQS. Range of operating
frequencies, programmable latencies and burst lengths allow the same device to be useful for a
variety of high bandwidth, high performance memory system applications.
Features：
• Power supply (Normal): VDD & VDDQ = 1.35V (1.283V to 1.45V)
• Backward-compatible to VDD=+1.5V+-0.075V
• MRS Cycle with address key programs
- CAS Latency (5,6,7,8,9,10,11)
- Burst Length (BL):8 and 4 with Burst Chop(BC)
• Bi-directional, differential data strobe (DQS and /DQS)
• Differential clock input (CK, /CK) operation
• DLL aligns DQ and DQS transition with CK transition
• Double-data-rate architecture; two data transfers per clock cycle
• 8 independent internal bank
• Internal (self) calibration: Internal self calibration through ZQ pin (RZQ:240 ohm±1%)
• Auto refresh and self refresh
• Average Refresh Period 7.8us at lower then TCASE 85°C, 3.9us at 85°C < TCASE ≤ 95°C
• 8-bit pre-fetch.
• On Die Termination using ODT pin.
• On-board I2C temperature sensor with integrated serial presence-detect (SPD) EEPROM.
• EEPROM software write protect.
• Lead-free products are RoHS Compliant
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